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authorPawel Moll <pawel.moll@arm.com>2013-01-24 11:48:54 +0000
committerPawel Moll <pawel.moll@arm.com>2013-01-24 12:19:23 +0000
commitab838bc9c2b9b3afc64d92928dfae9e09fa5b467 (patch)
tree367343f978e1a0fdf88d76a592a5179abe99b5cc /arch
parent1585defb4ceca98b12bd6fba6802c22e77e172bb (diff)
downloadlwn-ab838bc9c2b9b3afc64d92928dfae9e09fa5b467.tar.gz
lwn-ab838bc9c2b9b3afc64d92928dfae9e09fa5b467.zip
ARM: vexpress: Enable A7 cores in V2P-CA15_A7's Device Tree
As the kernel is able to cope with multiple clusters, uncomment the A7 cores in the Device Tree for V2P-CA15_A7 tile, making all 5 cores available to the user. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 1fc405a9ecfb..cf8071ad22d5 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -45,7 +45,6 @@
reg = <1>;
};
-/* A7s disabled till big.LITTLE patches are available...
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a7";
@@ -63,7 +62,6 @@
compatible = "arm,cortex-a7";
reg = <0x102>;
};
-*/
};
memory@80000000 {