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| author | Wu Zhangjin <wuzhangjin@gmail.com> | 2009-07-06 15:39:03 +0800 |
|---|---|---|
| committer | Wu Zhangjin <wuzhangjin@gmail.com> | 2010-03-10 04:39:07 +0800 |
| commit | 8235687ddfd6618f6257685f17280bf85db17595 (patch) | |
| tree | b7433f32e60bf8fb267f1f16577f42f73cce4bd5 /arch | |
| parent | 99335526b57f9e586ddaf3c2cc102abd9eb65e73 (diff) | |
| download | lwn-8235687ddfd6618f6257685f17280bf85db17595.tar.gz lwn-8235687ddfd6618f6257685f17280bf85db17595.zip | |
Loongson-2F: Flush the branch target history such as BTB and RAS
As the Chapter 15: "Errata: Issue of Out-of-order in loongson"[1] shows, to
workaround the Issue of Loongson-2F，We need to do:
"When switching from user model to kernel model, you should flush the branch
target history such as BTB and RAS."
This patch did clear BTB(branch target buffer), forbid RAS(row address strobe)
via Loongson-2F's 64bit diagnostic register.
[1] Chinese Version: http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/stackframe.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index 3b6da3330e32..b84cfda170f4 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -121,6 +121,25 @@ .endm #else .macro get_saved_sp /* Uniprocessor variation */ +#ifdef CONFIG_CPU_LOONGSON2F + /* + * Clear BTB(branch target buffer), forbid RAS(row address + * strobe) to workaround the Out-of-oder Issue in Loongson2F + * via it's diagnostic register. + */ + move k0, ra + jal 1f + nop +1: jal 1f + nop +1: jal 1f + nop +1: jal 1f + nop +1: move ra, k0 + li k0, 3 + mtc0 k0, $22 +#endif /* CONFIG_CPU_LOONGSON2F */ #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) lui k1, %hi(kernelsp) #else |