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authorAurelien Jarno <aurelien@aurel32.net>2015-09-05 18:47:31 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-11-12 11:35:48 +0100
commitbf463f2f7510771db180908507005379850dade0 (patch)
treec6236ec8ed2b321fad2fdbbb0bcacc36b09f5863 /arch
parent651d19fb10fac0f1f25c028c8e46ded9fc43a640 (diff)
downloadlwn-bf463f2f7510771db180908507005379850dade0.tar.gz
lwn-bf463f2f7510771db180908507005379850dade0.zip
MIPS: idle: add case for CPU_5KE
While the 5KE processors have never been taped out, they exists though a CP0.PRId and experimental RTLs or QEMU implementations. Add a case entry in the idle code, as they can use the standard idle loop like the 5K processors. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11099/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/idle.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 3e2b0b6c3b08..35af61530de1 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -165,6 +165,7 @@ void __init check_wait(void)
case CPU_4KEC:
case CPU_4KSC:
case CPU_5KC:
+ case CPU_5KE:
case CPU_25KF:
case CPU_PR4450:
case CPU_BMIPS3300: