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author | Chris Zankel <chris@zankel.net> | 2010-05-01 22:55:21 -0700 |
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committer | Chris Zankel <chris@zankel.net> | 2010-05-01 22:55:21 -0700 |
commit | 91e080633221cadece6c1c37786ef8a18a9d1a5e (patch) | |
tree | bf692d1036d806152f27c693373d0276e74eed1e /arch/xtensa | |
parent | 66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8 (diff) | |
download | lwn-91e080633221cadece6c1c37786ef8a18a9d1a5e.tar.gz lwn-91e080633221cadece6c1c37786ef8a18a9d1a5e.zip |
xtensa: Fix FLUSH_DCACHE macro for some variants.
Define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE also for processor configurations
that don't have cache-aliasing.
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa')
-rw-r--r-- | arch/xtensa/include/asm/cacheflush.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/xtensa/include/asm/cacheflush.h b/arch/xtensa/include/asm/cacheflush.h index a508f2f73bd7..376cd9d5f455 100644 --- a/arch/xtensa/include/asm/cacheflush.h +++ b/arch/xtensa/include/asm/cacheflush.h @@ -115,6 +115,7 @@ extern void flush_cache_page(struct vm_area_struct*, unsigned long, unsigned lon #define flush_cache_vmap(start,end) do { } while (0) #define flush_cache_vunmap(start,end) do { } while (0) +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 #define flush_dcache_page(page) do { } while (0) #define flush_cache_page(vma,addr,pfn) do { } while (0) |