diff options
author | Andi Kleen <ak@suse.de> | 2005-04-16 15:25:05 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:25:05 -0700 |
commit | c29601e9c1e7893d1755364e350c9188bd56d69f (patch) | |
tree | 14813ddce4d8897b40cc8b3a2f76ace3ac58b36f /arch/x86_64/kernel/setup.c | |
parent | dc37db4d8cb376bb67c6357c50d707ced3d71c39 (diff) | |
download | lwn-c29601e9c1e7893d1755364e350c9188bd56d69f.tar.gz lwn-c29601e9c1e7893d1755364e350c9188bd56d69f.zip |
[PATCH] x86_64: Support constantly ticking TSCs
On Intel Noconas the TSC ticks with a constant frequency. Don't scale the
factor used by udelay when cpufreq changes the frequency.
This generalizes an earlier patch by Intel for this.
Cc: <venkatesh.pallipadi@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/x86_64/kernel/setup.c')
-rw-r--r-- | arch/x86_64/kernel/setup.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index a191d4831789..b06221e31952 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c @@ -855,6 +855,8 @@ static void __init init_intel(struct cpuinfo_x86 *c) if (c->x86 == 15) c->x86_cache_alignment = c->x86_clflush_size * 2; + if (c->x86 >= 15) + set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability); } void __init get_cpu_vendor(struct cpuinfo_x86 *c) @@ -1055,7 +1057,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /* Other (Linux-defined) */ - "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr", NULL, NULL, NULL, NULL, + "cxmmx", NULL, "cyrix_arr", "centaur_mcr", "k8c+", + "constant_tsc", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |