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authorSuresh Siddha <suresh.b.siddha@intel.com>2010-08-27 11:09:49 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2010-09-15 17:36:45 -0700
commit62a92f4c69cd1d9361ad8c16be1dd16e6821bc15 (patch)
tree0e7dc5f29629d69bf93430b675d9d6d39e75c1f2 /arch/x86/include
parent75e3cfbed6f71a8f151dc6e413b6ce3c390030cb (diff)
downloadlwn-62a92f4c69cd1d9361ad8c16be1dd16e6821bc15.tar.gz
lwn-62a92f4c69cd1d9361ad8c16be1dd16e6821bc15.zip
x86, intr-remap: Remove IRTE setup duplicate code
Remove IRTE setup duplicate code with prepare_irte(). Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> LKML-Reference: <20100827181049.095067319@sbsiddha-MOBL3.sc.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/include')
-rw-r--r--arch/x86/include/asm/irq_remapping.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index f275e2244505..8d841505344e 100644
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -3,4 +3,31 @@
#define IRTE_DEST(dest) ((x2apic_mode) ? dest : dest << 8)
+#ifdef CONFIG_INTR_REMAP
+static inline void prepare_irte(struct irte *irte, int vector,
+ unsigned int dest)
+{
+ memset(irte, 0, sizeof(*irte));
+
+ irte->present = 1;
+ irte->dst_mode = apic->irq_dest_mode;
+ /*
+ * Trigger mode in the IRTE will always be edge, and for IO-APIC, the
+ * actual level or edge trigger will be setup in the IO-APIC
+ * RTE. This will help simplify level triggered irq migration.
+ * For more details, see the comments (in io_apic.c) explainig IO-APIC
+ * irq migration in the presence of interrupt-remapping.
+ */
+ irte->trigger_mode = 0;
+ irte->dlvry_mode = apic->irq_delivery_mode;
+ irte->vector = vector;
+ irte->dest_id = IRTE_DEST(dest);
+ irte->redir_hint = 1;
+}
+#else
+static void prepare_irte(struct irte *irte, int vector, unsigned int dest)
+{
+}
+#endif
+
#endif /* _ASM_X86_IRQ_REMAPPING_H */