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author | Shane Wang <shane.wang@intel.com> | 2010-04-29 12:09:01 -0400 |
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committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-07-05 11:11:18 -0700 |
commit | 66307ba1647f9666baebd342520bf83cb7832468 (patch) | |
tree | 5d8f071a5e22e91fca95d184a679c9b15bce13e5 /arch/x86/include | |
parent | 3b2711485ef5ef6ee3c0e0079ce5c4817d09b55e (diff) | |
download | lwn-66307ba1647f9666baebd342520bf83cb7832468.tar.gz lwn-66307ba1647f9666baebd342520bf83cb7832468.zip |
KVM: VMX: enable VMXON check with SMX enabled (Intel TXT)
Per document, for feature control MSR:
Bit 1 enables VMXON in SMX operation. If the bit is clear, execution
of VMXON in SMX operation causes a general-protection exception.
Bit 2 enables VMXON outside SMX operation. If the bit is clear, execution
of VMXON outside SMX operation causes a general-protection exception.
This patch is to enable this kind of check with SMX for VMXON in KVM.
Signed-off-by: Shane Wang <shane.wang@intel.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
(cherry picked from commit cafd66595d92591e4bd25c3904e004fc6f897e2d)
Diffstat (limited to 'arch/x86/include')
-rw-r--r-- | arch/x86/include/asm/msr-index.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 7825b0cf1d27..a7881c799bf2 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -198,8 +198,9 @@ #define MSR_IA32_EBL_CR_POWERON 0x0000002a #define MSR_IA32_FEATURE_CONTROL 0x0000003a -#define FEATURE_CONTROL_LOCKED (1<<0) -#define FEATURE_CONTROL_VMXON_ENABLED (1<<2) +#define FEATURE_CONTROL_LOCKED (1<<0) +#define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1) +#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2) #define MSR_IA32_APICBASE 0x0000001b #define MSR_IA32_APICBASE_BSP (1<<8) |