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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 18:03:39 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 18:03:39 -0800 |
commit | cb715a836642e0ec69350670d1c2f800f3e2d2e4 (patch) | |
tree | c4055162dee46d32a4318f18f1c7c70bc3f3f970 /arch/x86/include | |
parent | 27ea6dfdc23e5e96e324d6cb3488528c14e4a7f7 (diff) | |
parent | 2e32b7190641a184b8510d3e342400473ff1ab60 (diff) | |
download | lwn-cb715a836642e0ec69350670d1c2f800f3e2d2e4.tar.gz lwn-cb715a836642e0ec69350670d1c2f800f3e2d2e4.zip |
Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 cpu updates from Peter Anvin:
"This is a corrected attempt at the x86/cpu branch, this time with the
fixes in that makes it not break on KVM (current or past), or any
other virtualizer which traps on this configuration.
Again, the biggest change here is enabling the WC+ memory type on AMD
processors, if the BIOS doesn't."
* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86, kvm: Add MSR_AMD64_BU_CFG2 to the list of ignored MSRs
x86, cpu, amd: Fix WC+ workaround for older virtual hosts
x86, AMD: Enable WC+ memory type on family 10 processors
x86, AMD: Clean up init_amd()
x86/process: Change %8s to %s for pr_warn() in release_thread()
x86/cpu/hotplug: Remove CONFIG_EXPERIMENTAL dependency
Diffstat (limited to 'arch/x86/include')
-rw-r--r-- | arch/x86/include/uapi/asm/msr-index.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h index f26d2771846f..892ce40a7470 100644 --- a/arch/x86/include/uapi/asm/msr-index.h +++ b/arch/x86/include/uapi/asm/msr-index.h @@ -175,6 +175,7 @@ #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 #define MSR_AMD64_OSVW_STATUS 0xc0010141 #define MSR_AMD64_DC_CFG 0xc0011022 +#define MSR_AMD64_BU_CFG2 0xc001102a #define MSR_AMD64_IBSFETCHCTL 0xc0011030 #define MSR_AMD64_IBSFETCHLINAD 0xc0011031 #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032 |