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| author | Huang Rui <ray.huang@amd.com> | 2022-02-14 18:14:50 +0800 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2022-03-08 19:16:43 +0100 |
| commit | eb5616d4adeebf958a42822ee440d79e9f803bf7 (patch) | |
| tree | a369c3a5ca48f92708c405ea431ec71f57c3251d /arch/x86/include/asm/topology.h | |
| parent | 666f6ecf35bc3a14ab01fa761a7e17afac04dcd5 (diff) | |
| download | lwn-eb5616d4adeebf958a42822ee440d79e9f803bf7.tar.gz lwn-eb5616d4adeebf958a42822ee440d79e9f803bf7.zip | |
x86/ACPI: CPPC: Move init_freq_invariance_cppc() into x86 CPPC
The init_freq_invariance_cppc code actually doesn't need the SMP
functionality. So setting the CONFIG_SMP as the check condition for
init_freq_invariance_cppc may cause the confusion to misunderstand the
CPPC. And the x86 CPPC file is better space to store the CPPC related
functions, while the init_freq_invariance_cppc is out of smpboot, that
means, the CONFIG_SMP won't be mandatory condition any more. And It's more
clear than before.
Signed-off-by: Huang Rui <ray.huang@amd.com>
[ rjw: Subject adjustment ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch/x86/include/asm/topology.h')
| -rw-r--r-- | arch/x86/include/asm/topology.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index c35005a03768..9c73d62f7276 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -225,12 +225,10 @@ static inline void init_freq_invariance(bool secondary, bool cppc_ready) } #endif -#if defined(CONFIG_ACPI_CPPC_LIB) && defined(CONFIG_SMP) +#ifdef CONFIG_ACPI_CPPC_LIB void init_freq_invariance_cppc(void); #define init_freq_invariance_cppc init_freq_invariance_cppc -#endif -#ifdef CONFIG_ACPI_CPPC_LIB bool amd_set_max_freq_ratio(u64 *ratio); #else static inline bool amd_set_max_freq_ratio(u64 *ratio) |