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| author | Thomas Gleixner <tglx@linutronix.de> | 2022-04-15 21:19:54 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2022-04-27 20:22:19 +0200 |
| commit | 0dfaf3f6ecc0c7f4f876255aa82e8959d3721365 (patch) | |
| tree | 18882f052822ae061437d6f1c7485187d1429262 /arch/x86/include/asm/topology.h | |
| parent | 138a7f9c6beae8d652113b8e7a44994b4200bbcd (diff) | |
| download | lwn-0dfaf3f6ecc0c7f4f876255aa82e8959d3721365.tar.gz lwn-0dfaf3f6ecc0c7f4f876255aa82e8959d3721365.zip | |
x86/aperfmperf: Untangle Intel and AMD frequency invariance init
AMD boot CPU initialization happens late via ACPI/CPPC which prevents the
Intel parts from being marked __init.
Split out the common code and provide a dedicated interface for the AMD
initialization and mark the Intel specific code and data __init.
The remaining text size is almost cut in half:
text: 2614 -> 1350
init.text: 0 -> 786
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Paul E. McKenney <paulmck@kernel.org>
Link: https://lore.kernel.org/r/20220415161206.592465719@linutronix.de
Diffstat (limited to 'arch/x86/include/asm/topology.h')
| -rw-r--r-- | arch/x86/include/asm/topology.h | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index e2faedc6e793..cc317077e73e 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -216,24 +216,19 @@ extern void arch_scale_freq_tick(void); #define arch_scale_freq_tick arch_scale_freq_tick extern void arch_set_max_freq_ratio(bool turbo_disabled); -extern void bp_init_freq_invariance(bool cppc_ready); +extern void freq_invariance_set_perf_ratio(u64 ratio, bool turbo_disabled); +extern void bp_init_freq_invariance(void); extern void ap_init_freq_invariance(void); #else static inline void arch_set_max_freq_ratio(bool turbo_disabled) { } -static inline void bp_init_freq_invariance(bool cppc_ready) { } +static inline void freq_invariance_set_perf_ratio(u64 ratio, bool turbo_disabled) { } +static inline void bp_init_freq_invariance(void) { } static inline void ap_init_freq_invariance(void) { } #endif #ifdef CONFIG_ACPI_CPPC_LIB void init_freq_invariance_cppc(void); #define arch_init_invariance_cppc init_freq_invariance_cppc - -bool amd_set_max_freq_ratio(u64 *ratio); -#else -static inline bool amd_set_max_freq_ratio(u64 *ratio) -{ - return false; -} #endif #endif /* _ASM_X86_TOPOLOGY_H */ |