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authorBjorn Helgaas <bjorn.helgaas@hp.com>2009-11-13 17:34:08 -0700
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-11-24 15:29:11 -0800
commitdf5eb1d67e8074dfbc23cf396c556116728187b3 (patch)
tree1512457b52c6763ee9921094f62690d0a3b8b1e3 /arch/x86/include/asm/pci_x86.h
parentf7ca69848786bb99fdfafb511791b078c298438e (diff)
downloadlwn-df5eb1d67e8074dfbc23cf396c556116728187b3.tar.gz
lwn-df5eb1d67e8074dfbc23cf396c556116728187b3.zip
x86/PCI: MMCONFIG: add PCI_MMCFG_BUS_OFFSET() to factor common expression
This factors out the common "bus << 20" expression used when computing the MMCONFIG address. Reviewed-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'arch/x86/include/asm/pci_x86.h')
-rw-r--r--arch/x86/include/asm/pci_x86.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index b399988eee3a..7d94a235ec82 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -124,6 +124,8 @@ extern void __init pci_mmcfg_arch_free(void);
extern struct acpi_mcfg_allocation *pci_mmcfg_config;
extern int pci_mmcfg_config_num;
+#define PCI_MMCFG_BUS_OFFSET(bus) ((bus) << 20)
+
/*
* AMD Fam10h CPUs are buggy, and cannot access MMIO config space
* on their northbrige except through the * %eax register. As such, you MUST