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authorPeter Zijlstra <peterz@infradead.org>2014-04-23 20:28:37 +0200
committerThomas Gleixner <tglx@linutronix.de>2015-07-27 14:06:23 +0200
commit7fc1845dd45a825b3c2b760df342a94f61fb1113 (patch)
treebeac8c005d76389fbba5d251cc5774e9428c3ecb /arch/x86/include/asm/atomic64_64.h
parentae8c35c85be92b79c545c57c2a14c2f8136d3353 (diff)
downloadlwn-7fc1845dd45a825b3c2b760df342a94f61fb1113.tar.gz
lwn-7fc1845dd45a825b3c2b760df342a94f61fb1113.zip
x86: Provide atomic_{or,xor,and}
Implement atomic logic ops -- atomic_{or,xor,and}. These will replace the atomic_{set,clear}_mask functions that are available on some archs. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/atomic64_64.h')
-rw-r--r--arch/x86/include/asm/atomic64_64.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/x86/include/asm/atomic64_64.h b/arch/x86/include/asm/atomic64_64.h
index b965f9e03f2a..50e33eff58de 100644
--- a/arch/x86/include/asm/atomic64_64.h
+++ b/arch/x86/include/asm/atomic64_64.h
@@ -220,4 +220,19 @@ static inline long atomic64_dec_if_positive(atomic64_t *v)
return dec;
}
+#define ATOMIC64_OP(op) \
+static inline void atomic64_##op(long i, atomic64_t *v) \
+{ \
+ asm volatile(LOCK_PREFIX #op"q %1,%0" \
+ : "+m" (v->counter) \
+ : "er" (i) \
+ : "memory"); \
+}
+
+ATOMIC64_OP(and)
+ATOMIC64_OP(or)
+ATOMIC64_OP(xor)
+
+#undef ATOMIC64_OP
+
#endif /* _ASM_X86_ATOMIC64_64_H */