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| author | Joerg Roedel <jroedel@suse.de> | 2020-09-07 15:15:24 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2020-09-07 19:45:25 +0200 |
| commit | 597cfe48212a3f110ab0f918bf59791f453e65b7 (patch) | |
| tree | 3ca6f66974264437ac3d4c71f95b3a21e5d159b3 /arch/x86/boot/compressed/idt_64.c | |
| parent | c81d60029a1393183d2125fcb4b64831629b8864 (diff) | |
| download | lwn-597cfe48212a3f110ab0f918bf59791f453e65b7.tar.gz lwn-597cfe48212a3f110ab0f918bf59791f453e65b7.zip | |
x86/boot/compressed/64: Setup a GHCB-based VC Exception handler
Install an exception handler for #VC exception that uses a GHCB. Also
add the infrastructure for handling different exit-codes by decoding
the instruction that caused the exception and error handling.
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200907131613.12703-24-joro@8bytes.org
Diffstat (limited to 'arch/x86/boot/compressed/idt_64.c')
| -rw-r--r-- | arch/x86/boot/compressed/idt_64.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/boot/compressed/idt_64.c b/arch/x86/boot/compressed/idt_64.c index f3ca7324be44..804a502ee0d2 100644 --- a/arch/x86/boot/compressed/idt_64.c +++ b/arch/x86/boot/compressed/idt_64.c @@ -46,5 +46,9 @@ void load_stage2_idt(void) set_idt_entry(X86_TRAP_PF, boot_page_fault); +#ifdef CONFIG_AMD_MEM_ENCRYPT + set_idt_entry(X86_TRAP_VC, boot_stage2_vc); +#endif + load_boot_idt(&boot_idt_desc); } |