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| author | Tejun Heo <tj@kernel.org> | 2011-01-25 14:26:50 +0100 |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2011-01-25 14:26:50 +0100 |
| commit | 19df0c2fef010e94e90df514aaf4e73f6b80145c (patch) | |
| tree | 4b0b9c10622aead0d8b658cca6c49090149a91a8 /arch/um/include | |
| parent | c723fdab8aa728dc2bf0da6a0de8bb9c3f588d84 (diff) | |
| download | lwn-19df0c2fef010e94e90df514aaf4e73f6b80145c.tar.gz lwn-19df0c2fef010e94e90df514aaf4e73f6b80145c.zip | |
percpu: align percpu readmostly subsection to cacheline
Currently percpu readmostly subsection may share cachelines with other
percpu subsections which may result in unnecessary cacheline bounce
and performance degradation.
This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
linker macros, makes each arch linker scripts specify its cacheline
size and use it to align percpu subsections.
This is based on Shaohua's x86 only patch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Shaohua Li <shaohua.li@intel.com>
Diffstat (limited to 'arch/um/include')
| -rw-r--r-- | arch/um/include/asm/common.lds.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/um/include/asm/common.lds.S b/arch/um/include/asm/common.lds.S index ac55b9efa1ce..34bede8aad4a 100644 --- a/arch/um/include/asm/common.lds.S +++ b/arch/um/include/asm/common.lds.S @@ -42,7 +42,7 @@ INIT_SETUP(0) } - PERCPU(32) + PERCPU(32, 32) .initcall.init : { INIT_CALLS |