summaryrefslogtreecommitdiff
path: root/arch/sparc/kernel/perf_event.c
diff options
context:
space:
mode:
authorbob picco <bpicco@meloft.net>2014-09-16 10:09:06 -0400
committerDavid S. Miller <davem@davemloft.net>2014-09-16 18:26:40 -0700
commit05aa1651e8b9ca078b1808a2fe7b50703353ec02 (patch)
tree9a3cb98b69a4f1960c627586975043bcb364c82e /arch/sparc/kernel/perf_event.c
parent7c21d533ab2ffa1e681bdaf4a53ce3046f6e0e17 (diff)
downloadlwn-05aa1651e8b9ca078b1808a2fe7b50703353ec02.tar.gz
lwn-05aa1651e8b9ca078b1808a2fe7b50703353ec02.zip
sparc64: T5 PMU
The T5 (niagara5) has different PCR related HV fast trap values and a new HV API Group. This patch utilizes these and shares when possible with niagara4. We use the same sparc_pmu niagara4_pmu. Should there be new effort to obtain the MCU perf statistics then this would have to be changed. Cc: sparclinux@vger.kernel.org Signed-off-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/perf_event.c')
-rw-r--r--arch/sparc/kernel/perf_event.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index d35c490a91cb..c9759ad3f34a 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1662,7 +1662,8 @@ static bool __init supported_pmu(void)
sparc_pmu = &niagara2_pmu;
return true;
}
- if (!strcmp(sparc_pmu_type, "niagara4")) {
+ if (!strcmp(sparc_pmu_type, "niagara4") ||
+ !strcmp(sparc_pmu_type, "niagara5")) {
sparc_pmu = &niagara4_pmu;
return true;
}