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| author | Magnus Damm <damm@igel.co.jp> | 2009-08-15 02:53:42 +0000 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-15 12:58:50 +0900 |
| commit | 237674e050ae8ea40a432412df6c15d60b7ae8a6 (patch) | |
| tree | bfd871566047c1e33870e753444a7b7db2257a38 /arch/sh | |
| parent | 9747e78b304b44d6fb73e2c8071406d55aa8bb75 (diff) | |
| download | lwn-237674e050ae8ea40a432412df6c15d60b7ae8a6.tar.gz lwn-237674e050ae8ea40a432412df6c15d60b7ae8a6.zip | |
sh: sh7724 ddr self-refresh changes
This patch updates the SuperH Mobile sleep assembly code with
support for DBSC memory controller found in the sh7724 processor.
Without this fix the memory hooked up to the sh7724 processor
will never enter self-refresh mode before suspending to ram. The
effect of this is that the memory contents most likeley will be
lost upon resume which may or may not be what you want.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/kernel/cpu/shmobile/sleep.S | 70 |
1 files changed, 68 insertions, 2 deletions
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S index 5d888ef53d82..baf2d7d46b05 100644 --- a/arch/sh/kernel/cpu/shmobile/sleep.S +++ b/arch/sh/kernel/cpu/shmobile/sleep.S @@ -26,8 +26,30 @@ ENTRY(sh_mobile_standby) tst #SUSP_SH_SF, r0 bt skip_set_sf +#ifdef CONFIG_CPU_SUBTYPE_SH7724 + /* DBSC: put memory in self-refresh mode */ - /* SDRAM: disable power down and put in self-refresh mode */ + mov.l dben_reg, r4 + mov.l dben_data0, r1 + mov.l r1, @r4 + + mov.l dbrfpdn0_reg, r4 + mov.l dbrfpdn0_data0, r1 + mov.l r1, @r4 + + mov.l dbcmdcnt_reg, r4 + mov.l dbcmdcnt_data0, r1 + mov.l r1, @r4 + + mov.l dbcmdcnt_reg, r4 + mov.l dbcmdcnt_data1, r1 + mov.l r1, @r4 + + mov.l dbrfpdn0_reg, r4 + mov.l dbrfpdn0_data1, r1 + mov.l r1, @r4 +#else + /* SBSC: disable power down and put in self-refresh mode */ mov.l 1f, r4 mov.l 2f, r1 mov.l @r4, r2 @@ -35,6 +57,7 @@ ENTRY(sh_mobile_standby) mov.l 3f, r3 and r3, r2 mov.l r2, @r4 +#endif skip_set_sf: tst #SUSP_SH_SLEEP, r0 @@ -84,7 +107,36 @@ done_sleep: tst #SUSP_SH_SF, r0 bt skip_restore_sf - /* SDRAM: set auto-refresh mode */ +#ifdef CONFIG_CPU_SUBTYPE_SH7724 + /* DBSC: put memory in auto-refresh mode */ + + mov.l dbrfpdn0_reg, r4 + mov.l dbrfpdn0_data0, r1 + mov.l r1, @r4 + + /* sleep 140 ns */ + nop + nop + nop + nop + + mov.l dbcmdcnt_reg, r4 + mov.l dbcmdcnt_data0, r1 + mov.l r1, @r4 + + mov.l dbcmdcnt_reg, r4 + mov.l dbcmdcnt_data1, r1 + mov.l r1, @r4 + + mov.l dben_reg, r4 + mov.l dben_data1, r1 + mov.l r1, @r4 + + mov.l dbrfpdn0_reg, r4 + mov.l dbrfpdn0_data2, r1 + mov.l r1, @r4 +#else + /* SBSC: set auto-refresh mode */ mov.l 1f, r4 mov.l @r4, r2 mov.l 4f, r3 @@ -98,15 +150,29 @@ done_sleep: add r4, r3 or r2, r3 mov.l r3, @r1 +#endif skip_restore_sf: rts nop .balign 4 +#ifdef CONFIG_CPU_SUBTYPE_SH7724 +dben_reg: .long 0xfd000010 /* DBEN */ +dben_data0: .long 0 +dben_data1: .long 1 +dbrfpdn0_reg: .long 0xfd000040 /* DBRFPDN0 */ +dbrfpdn0_data0: .long 0 +dbrfpdn0_data1: .long 1 +dbrfpdn0_data2: .long 0x00010000 +dbcmdcnt_reg: .long 0xfd000014 /* DBCMDCNT */ +dbcmdcnt_data0: .long 2 +dbcmdcnt_data1: .long 4 +#else 1: .long 0xfe400008 /* SDCR0 */ 2: .long 0x00000400 3: .long 0xffff7fff 4: .long 0xfffffbff +#endif 5: .long 0xa4150020 /* STBCR */ 6: .long 0xfe40001c /* RTCOR */ 7: .long 0xfe400018 /* RTCNT */ |