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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2017-01-11 16:43:25 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-01-19 14:17:04 +0100 |
| commit | c3fa400b276325b57a20e1e54e6fcc18a98e962c (patch) | |
| tree | c8e56f92e123eb455f02f9941872f4cafe159f8d /arch/sh/kernel/cpu/sh4a/setup-sh7785.c | |
| parent | 3d73f32bfa312155a0990efd95803a3e7061140c (diff) | |
| download | lwn-c3fa400b276325b57a20e1e54e6fcc18a98e962c.tar.gz lwn-c3fa400b276325b57a20e1e54e6fcc18a98e962c.zip | |
sh: Don't set sh-sci pdata scscr TE and RE bits
The bits are set by the driver internally, don't set them in platform
data.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7785.c')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index c72d5a5d0995..22893c0f1662 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -21,7 +21,7 @@ static struct plat_sci_port scif0_platform_data = { .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scscr = SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -43,7 +43,7 @@ static struct platform_device scif0_device = { static struct plat_sci_port scif1_platform_data = { .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scscr = SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -65,7 +65,7 @@ static struct platform_device scif1_device = { static struct plat_sci_port scif2_platform_data = { .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scscr = SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -87,7 +87,7 @@ static struct platform_device scif2_device = { static struct plat_sci_port scif3_platform_data = { .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scscr = SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -109,7 +109,7 @@ static struct platform_device scif3_device = { static struct plat_sci_port scif4_platform_data = { .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scscr = SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; @@ -131,7 +131,7 @@ static struct platform_device scif4_device = { static struct plat_sci_port scif5_platform_data = { .flags = UPF_BOOT_AUTOCONF, - .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, + .scscr = SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, }; |