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| author | Matt Fleming <matt@console-pimps.org> | 2010-03-26 11:37:16 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-03-26 11:37:16 +0900 |
| commit | 4539282dbc20fe612113c8f267d51a90d46a7f50 (patch) | |
| tree | 579f4785bd2e06339291df2c1d17c0b7be93df0c /arch/sh/include/cpu-sh4 | |
| parent | 01e77706cdde7c0b47e5ca1f4284a795504c7c40 (diff) | |
| download | lwn-4539282dbc20fe612113c8f267d51a90d46a7f50.tar.gz lwn-4539282dbc20fe612113c8f267d51a90d46a7f50.zip | |
sh: update the TLB replacement counter for entry wiring.
Presently the TLB wiring code depends on MMUCR.URB for working out where
to place the wired entry, but fails to take the replacment counter in to
consideration. This fixes up the wiring logic and ensures that wired
entries remain so.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh4')
| -rw-r--r-- | arch/sh/include/cpu-sh4/cpu/mmu_context.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h index 310ec92f2759..5963124c1d4a 100644 --- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h +++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h @@ -30,6 +30,8 @@ #define MMUCR_URB 0x00FC0000 #define MMUCR_URB_SHIFT 18 #define MMUCR_URB_NENTRIES 64 +#define MMUCR_URC 0x0000FC00 +#define MMUCR_URC_SHIFT 10 #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) #define MMUCR_SE (1 << 4) |