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| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2022-08-30 12:12:40 +0300 |
|---|---|---|
| committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2022-09-05 09:02:16 +0300 |
| commit | 3846d011403b57190b6b3e917cc8b3ab810fa293 (patch) | |
| tree | bb2e1d46db6ef392faef5dc10d7644052f072ebe /arch/riscv | |
| parent | 95f8f1cbc87bfd361286d8e0129108d2112e653e (diff) | |
| download | lwn-3846d011403b57190b6b3e917cc8b3ab810fa293.tar.gz lwn-3846d011403b57190b6b3e917cc8b3ab810fa293.zip | |
thunderbolt: Pass CL state bitmask to tb_port_clx_supported()
Instead of testing just a single CL state we can pass a bitmask of
states to check. This makes it simpler for callers of the function.
We also add a check for CL2 even though not fully supported by the
driver yet.
Suggested-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'arch/riscv')
0 files changed, 0 insertions, 0 deletions