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authorPalmer Dabbelt <palmer@sifive.com>2018-06-11 09:09:49 -0700
committerPalmer Dabbelt <palmer@sifive.com>2018-06-11 09:09:49 -0700
commite0e0c87c022b654bcc79224ce73633f0d274e091 (patch)
tree5ce8e15d02608f83147daae33d5ee41b164c081c /arch/riscv/lib
parent41611ed2c82460bce830b7f1f132a9cfff002d86 (diff)
parent86406d51d3600bfa2b6f86e1e6bfce712bec0d53 (diff)
downloadlwn-e0e0c87c022b654bcc79224ce73633f0d274e091.tar.gz
lwn-e0e0c87c022b654bcc79224ce73633f0d274e091.zip
RISC-V: Make our port sparse-clean
This patch set contains a handful of fixes that clean up the sparse results for the RISC-V port. These patches shouldn't have any functional difference. The patches: * Use NULL instead of 0. * Clean up __user annotations. * Split __copy_user into two functions, to make the __user annotations valid. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Diffstat (limited to 'arch/riscv/lib')
-rw-r--r--arch/riscv/lib/uaccess.S6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/riscv/lib/uaccess.S b/arch/riscv/lib/uaccess.S
index 0173ea296baa..399e6f0c2d98 100644
--- a/arch/riscv/lib/uaccess.S
+++ b/arch/riscv/lib/uaccess.S
@@ -13,7 +13,8 @@ _epc:
.previous
.endm
-ENTRY(__copy_user)
+ENTRY(__asm_copy_to_user)
+ENTRY(__asm_copy_from_user)
/* Enable access to user memory */
li t6, SR_SUM
@@ -63,7 +64,8 @@ ENTRY(__copy_user)
addi a0, a0, 1
bltu a1, a3, 5b
j 3b
-ENDPROC(__copy_user)
+ENDPROC(__asm_copy_to_user)
+ENDPROC(__asm_copy_from_user)
ENTRY(__clear_user)