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authorAndrew Jones <ajones@ventanamicro.com>2023-09-18 15:15:22 +0200
committerPalmer Dabbelt <palmer@rivosinc.com>2023-09-21 04:22:25 -0700
commit9c7646d5ffd2b8bf720a0b77897f6c5095dfc53b (patch)
treec568378dca2f84e014409ec1c6cd83c702cab598 /arch/riscv/include/uapi/asm/hwprobe.h
parent43c16d51a19b0ba2ed66978d5924d486ec1e42bc (diff)
downloadlwn-9c7646d5ffd2b8bf720a0b77897f6c5095dfc53b.tar.gz
lwn-9c7646d5ffd2b8bf720a0b77897f6c5095dfc53b.zip
RISC-V: hwprobe: Expose Zicboz extension and its block size
Expose Zicboz through hwprobe and also provide a key to extract its respective block size. Opportunistically add a macro and apply it to current extensions in order to avoid duplicating code. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Evan Green <evan@rivosinc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230918131518.56803-11-ajones@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include/uapi/asm/hwprobe.h')
-rw-r--r--arch/riscv/include/uapi/asm/hwprobe.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index 006bfb48343d..86d08a0e617b 100644
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -29,6 +29,7 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_EXT_ZBA (1 << 3)
#define RISCV_HWPROBE_EXT_ZBB (1 << 4)
#define RISCV_HWPROBE_EXT_ZBS (1 << 5)
+#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
@@ -36,6 +37,7 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_MISALIGNED_FAST (3 << 0)
#define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0)
#define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0)
+#define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6
/* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
#endif