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| author | Samuel Holland <samuel@sholland.org> | 2023-01-25 22:57:38 -0600 |
|---|---|---|
| committer | Jernej Skrabec <jernej.skrabec@gmail.com> | 2023-01-27 23:10:08 +0100 |
| commit | eb20e7cb91ba3e5dbd94b6bfc8b9609bd5fd5770 (patch) | |
| tree | 554b5da2effac1597396c1730701222e4fe226ab /arch/riscv/configs | |
| parent | 1b929c02afd37871d5afb9d498426f83432e71c2 (diff) | |
| download | lwn-eb20e7cb91ba3e5dbd94b6bfc8b9609bd5fd5770.tar.gz lwn-eb20e7cb91ba3e5dbd94b6bfc8b9609bd5fd5770.zip | |
riscv: defconfig: Enable the Allwinner D1 platform and drivers
Now that several D1-based boards are supported, enable the platform in
our defconfig. Build in the drivers which are necessary to boot, such as
the pinctrl, MMC, RTC (which provides critical clocks), SPI (for flash),
and watchdog (which may be left enabled by the bootloader). Other common
onboard peripherals are enabled as modules.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20230126045738.47903-12-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'arch/riscv/configs')
| -rw-r--r-- | arch/riscv/configs/defconfig | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 128dcf4c0814..d98d6e90b2b8 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -29,6 +29,7 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y CONFIG_ARCH_RENESAS=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_STARFIVE=y +CONFIG_ARCH_SUNXI=y CONFIG_SOC_VIRT=y CONFIG_SMP=y CONFIG_HOTPLUG_CPU=y @@ -120,8 +121,10 @@ CONFIG_VIRTIO_NET=y CONFIG_MACB=y CONFIG_E1000E=y CONFIG_R8169=y +CONFIG_STMMAC_ETH=m CONFIG_MICROSEMI_PHY=y CONFIG_INPUT_MOUSEDEV=y +CONFIG_KEYBOARD_SUN4I_LRADC=m CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y @@ -130,14 +133,20 @@ CONFIG_SERIAL_SH_SCI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y +CONFIG_I2C_MV64XXX=m CONFIG_SPI=y CONFIG_SPI_SIFIVE=y +CONFIG_SPI_SUN6I=y # CONFIG_PTP_1588_CLOCK is not set -CONFIG_GPIOLIB=y CONFIG_GPIO_SIFIVE=y +CONFIG_WATCHDOG=y +CONFIG_SUNXI_WATCHDOG=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_DRM=m CONFIG_DRM_RADEON=m CONFIG_DRM_NOUVEAU=m +CONFIG_DRM_SUN4I=m CONFIG_DRM_VIRTIO_GPU=m CONFIG_FB=y CONFIG_FRAMEBUFFER_CONSOLE=y @@ -150,21 +159,32 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_STORAGE=y CONFIG_USB_UAS=y +CONFIG_USB_MUSB_HDRC=m +CONFIG_USB_MUSB_SUNXI=m +CONFIG_NOP_USB_XCEIV=m CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MMC_SPI=y +CONFIG_MMC_SUNXI=y CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_SUN6I=y +CONFIG_DMADEVICES=y +CONFIG_DMA_SUN6I=m CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=y CONFIG_VIRTIO_MMIO=y +CONFIG_SUN8I_DE2_CCU=m +CONFIG_SUN50I_IOMMU=y CONFIG_RPMSG_CHAR=y CONFIG_RPMSG_CTRL=y CONFIG_RPMSG_VIRTIO=y CONFIG_ARCH_R9A07G043=y +CONFIG_PHY_SUN4I_USB=m CONFIG_LIBNVDIMM=y +CONFIG_NVMEM_SUNXI_SID=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y |