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| author | Stephen Rothwell <sfr@canb.auug.org.au> | 2005-10-17 11:50:32 +1000 |
|---|---|---|
| committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2005-10-17 11:50:32 +1000 |
| commit | 7dffb72028bfd909ac51a1546d182de2df4d2426 (patch) | |
| tree | c465c35642872973543f710f8aa06b955b84f7e5 /arch/ppc/kernel/cpu_setup_6xx.S | |
| parent | cf764855620aa1aa5b134687ca18b841ac9be4c7 (diff) | |
| download | lwn-7dffb72028bfd909ac51a1546d182de2df4d2426.tar.gz lwn-7dffb72028bfd909ac51a1546d182de2df4d2426.zip | |
ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTES
instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/ppc/kernel/cpu_setup_6xx.S')
| -rw-r--r-- | arch/ppc/kernel/cpu_setup_6xx.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S index a5333c07fc3c..55ed7716636f 100644 --- a/arch/ppc/kernel/cpu_setup_6xx.S +++ b/arch/ppc/kernel/cpu_setup_6xx.S @@ -290,10 +290,10 @@ _GLOBAL(__init_fpu_registers) #define CS_SIZE 32 .data - .balign L1_CACHE_LINE_SIZE + .balign L1_CACHE_BYTES cpu_state_storage: .space CS_SIZE - .balign L1_CACHE_LINE_SIZE,0 + .balign L1_CACHE_BYTES,0 .text /* Called in normal context to backup CPU 0 state. This |