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| author | Nicholas Piggin <npiggin@gmail.com> | 2018-05-10 11:04:24 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-06-03 20:40:30 +1000 |
| commit | 3130a7bb6eb595f2d963976a4d3e57db77bcf06f (patch) | |
| tree | b200439bd36ee32672d713904b607a0e7aeb4739 /arch/powerpc/kernel/process.c | |
| parent | 81ea11d3af3aba0bea475dd1dd2f79977a761239 (diff) | |
| download | lwn-3130a7bb6eb595f2d963976a4d3e57db77bcf06f.tar.gz lwn-3130a7bb6eb595f2d963976a4d3e57db77bcf06f.zip | |
powerpc/64: change softe to irqmask in show_regs and xmon
When the soft enabled flag was changed to a soft disable mask, xmon
and register dump code was not updated to reflect that, which is
confusing ('SOFTE: 1' previously meant interrupts were soft enabled,
currently it means the opposite, the general interrupt type has been
disabled).
Fix this by using the name irqmask, and printing it in hex.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/process.c')
| -rw-r--r-- | arch/powerpc/kernel/process.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 2a7fa5000cce..8f35b30956f4 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -1420,7 +1420,7 @@ void show_regs(struct pt_regs * regs) pr_cont("DAR: "REG" DSISR: %08lx ", regs->dar, regs->dsisr); #endif #ifdef CONFIG_PPC64 - pr_cont("SOFTE: %ld ", regs->softe); + pr_cont("IRQMASK: %lx ", regs->softe); #endif #ifdef CONFIG_PPC_TRANSACTIONAL_MEM if (MSR_TM_ACTIVE(regs->msr)) |