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authorStephen Rothwell <sfr@canb.auug.org.au>2007-09-18 17:25:12 +1000
committerPaul Mackerras <paulus@samba.org>2007-09-19 15:25:34 +1000
commit9e4859ef5462193643fd2b3c8ffb298e5a4a4319 (patch)
treed3c225cdfe123a98af1b6bbf280178ae1eb367cc /arch/powerpc/kernel/head_64.S
parentee7a76da1ef5e3e5e0e54e84319e435ea25c267c (diff)
downloadlwn-9e4859ef5462193643fd2b3c8ffb298e5a4a4319.tar.gz
lwn-9e4859ef5462193643fd2b3c8ffb298e5a4a4319.zip
[POWERPC] FWNMI is only used on pSeries
This saves 4k on non pSeries builds (except for iSeries where it saves almost 4k). Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/head_64.S')
-rw-r--r--arch/powerpc/kernel/head_64.S7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 384cc75f1cd4..22ac245bd59a 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -341,6 +341,7 @@ slb_miss_user_pseries:
b . /* prevent spec. execution */
#endif /* __DISABLED__ */
+#ifdef CONFIG_PPC_PSERIES
/*
* Vectors for the FWNMI option. Share common code.
*/
@@ -358,6 +359,8 @@ machine_check_fwnmi:
mtspr SPRN_SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(PACA_EXMC, machine_check_common)
+#endif /* CONFIG_PPC_PSERIES */
+
/*** Common interrupt handlers ***/
STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
@@ -1012,6 +1015,7 @@ _GLOBAL(do_stab_bolted)
initial_stab:
.space 4096
+#ifdef CONFIG_PPC_PSERIES
/*
* Data area reserved for FWNMI option.
* This address (0x7000) is fixed by the RPA.
@@ -1019,6 +1023,7 @@ initial_stab:
.= 0x7000
.globl fwnmi_data_area
fwnmi_data_area:
+#endif /* CONFIG_PPC_PSERIES */
/* iSeries does not use the FWNMI stuff, so it is safe to put
* this here, even if we later allow kernels that will boot on
@@ -1043,7 +1048,9 @@ xLparMap:
#endif /* CONFIG_PPC_ISERIES */
+#ifdef CONFIG_PPC_PSERIES
. = 0x8000
+#endif /* CONFIG_PPC_PSERIES */
/*
* On pSeries and most other platforms, secondary processors spin