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author | Michael Ellerman <michael@ellerman.id.au> | 2013-04-30 20:17:04 +0000 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-05-02 10:37:36 +1000 |
commit | 9353374b8e1585d5fa47a1e5c1d3e9155dd0eb7c (patch) | |
tree | e6fdfc6f3a7aa57214fb481d965ab4378f2fbc7c /arch/powerpc/kernel/asm-offsets.c | |
parent | 1ddf499e1a49e67c02b89e6565d091a0bda29a91 (diff) | |
download | lwn-9353374b8e1585d5fa47a1e5c1d3e9155dd0eb7c.tar.gz lwn-9353374b8e1585d5fa47a1e5c1d3e9155dd0eb7c.zip |
powerpc: Context switch the new EBB SPRs
This context switches the new Event Based Branching (EBB) SPRs. The three new
SPRs are:
- Event Based Branch Handler Register (EBBHR)
- Event Based Branch Return Register (EBBRR)
- Branch Event Status and Control Register (BESCR)
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/asm-offsets.c')
-rw-r--r-- | arch/powerpc/kernel/asm-offsets.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index b6c17ec9b169..172233eab799 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c @@ -124,6 +124,9 @@ int main(void) #ifdef CONFIG_PPC_BOOK3S_64 DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar)); + DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr)); + DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr)); + DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr)); #endif #ifdef CONFIG_PPC_TRANSACTIONAL_MEM DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch)); |