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| author | Ian Munsie <imunsie@au1.ibm.com> | 2013-02-07 15:46:58 +0000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-02-08 14:05:50 +1100 |
| commit | 2468dcf641e4f3e1b0153e3e11ca20740b2f4ce8 (patch) | |
| tree | 02a1ca877b20fd0975befc2554957ee4b535a6a0 /arch/powerpc/include/asm/reg.h | |
| parent | 14b6f00f8a4fdec5ccd45a0710284de301a61628 (diff) | |
| download | lwn-2468dcf641e4f3e1b0153e3e11ca20740b2f4ce8.tar.gz lwn-2468dcf641e4f3e1b0153e3e11ca20740b2f4ce8.zip | |
powerpc: Add support for context switching the TAR register
This patch adds support for enabling and context switching the Target
Address Register in Power8. The TAR is a new special purpose register
that can be used for computed branches with the bctar[l] (branch
conditional to TAR) instruction in the same manner as the count and link
registers.
Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
| -rw-r--r-- | arch/powerpc/include/asm/reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 1f59fbb7b054..e09ac51961d7 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -237,6 +237,9 @@ #define SPRN_HRMOR 0x139 /* Real mode offset register */ #define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ +#define SPRN_FSCR 0x099 /* Facility Status & Control Register */ +#define FSCR_TAR (1<<8) /* Enable Target Adress Register */ +#define SPRN_TAR 0x32f /* Target Address Register */ #define SPRN_LPCR 0x13E /* LPAR Control Register */ #define LPCR_VPM0 (1ul << (63-0)) #define LPCR_VPM1 (1ul << (63-1)) |