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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2018-12-11 13:27:33 +1100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-12-20 22:21:20 +1100 |
| commit | 3cfb9ebe906b51f2942b1e251009bb251efd2ba6 (patch) | |
| tree | e038026a51938247ee85990e99ae6de263ee7e99 /arch/powerpc/boot/dts | |
| parent | 51f4cc2047a4b7e9bf1b49acf06c110991fd4167 (diff) | |
| download | lwn-3cfb9ebe906b51f2942b1e251009bb251efd2ba6.tar.gz lwn-3cfb9ebe906b51f2942b1e251009bb251efd2ba6.zip | |
powerpc/44x/bamboo: Fix PCI range
The bamboo dts has a bug: it uses a non-naturally aligned range
for PCI memory space. This isnt' supported by the code, thus
causing PCI to break on this system.
This is due to the fact that while the chip memory map has 1G
reserved for PCI memory, it's only 512M aligned. The code doesn't
know how to split that into 2 different PMMs and fails, so limit
the region to 512M.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/boot/dts')
| -rw-r--r-- | arch/powerpc/boot/dts/bamboo.dts | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts index 538e42b1120d..b5861fa3836c 100644 --- a/arch/powerpc/boot/dts/bamboo.dts +++ b/arch/powerpc/boot/dts/bamboo.dts @@ -268,8 +268,10 @@ /* Outbound ranges, one memory and one IO, * later cannot be changed. Chip supports a second * IO range but we don't use it for now + * The chip also supports a larger memory range but + * it's not naturally aligned, so our code will break */ - ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000 + ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |