diff options
| author | Scott Wood <scottwood@freescale.com> | 2014-05-05 20:35:10 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2014-05-22 18:10:42 -0500 |
| commit | e83eb028bb980cecc85b050aa626df384723aff2 (patch) | |
| tree | 4e58df362d96f4f5e38d1c0b3b5cc064b88b69c5 /arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | |
| parent | 8cb59788b342903f2912ecef0df4aaadd12e5843 (diff) | |
| download | lwn-e83eb028bb980cecc85b050aa626df384723aff2.tar.gz lwn-e83eb028bb980cecc85b050aa626df384723aff2.zip | |
powerpc/fsl: Add fsl,portid-mapping to corenet1-cf chips
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Diana Craciun <diana.craciun@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi')
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi index 22f3b14517de..b1ea147f2995 100644 --- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi +++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi @@ -83,6 +83,7 @@ reg = <0>; clocks = <&mux0>; next-level-cache = <&L2_0>; + fsl,portid-mapping = <0x80000000>; L2_0: l2-cache { next-level-cache = <&cpc>; }; @@ -92,6 +93,7 @@ reg = <1>; clocks = <&mux1>; next-level-cache = <&L2_1>; + fsl,portid-mapping = <0x40000000>; L2_1: l2-cache { next-level-cache = <&cpc>; }; @@ -101,6 +103,7 @@ reg = <2>; clocks = <&mux2>; next-level-cache = <&L2_2>; + fsl,portid-mapping = <0x20000000>; L2_2: l2-cache { next-level-cache = <&cpc>; }; @@ -110,6 +113,7 @@ reg = <3>; clocks = <&mux3>; next-level-cache = <&L2_3>; + fsl,portid-mapping = <0x10000000>; L2_3: l2-cache { next-level-cache = <&cpc>; }; |