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author | Nicholas Piggin <npiggin@gmail.com> | 2021-06-18 01:51:03 +1000 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-06-25 00:06:55 +1000 |
commit | 59dc5bfca0cb6a29db1a50847684eb5c19f8f400 (patch) | |
tree | e59ddd65cf780da3df22074afee961dc8503cdc2 /arch/powerpc/Kconfig.debug | |
parent | 1df7d5e4baeac74d14c1bee18b2dff9302b3efbc (diff) | |
download | lwn-59dc5bfca0cb6a29db1a50847684eb5c19f8f400.tar.gz lwn-59dc5bfca0cb6a29db1a50847684eb5c19f8f400.zip |
powerpc/64s: avoid reloading (H)SRR registers if they are still valid
When an interrupt is taken, the SRR registers are set to return to where
it left off. Unless they are modified in the meantime, or the return
address or MSR are modified, there is no need to reload these registers
when returning from interrupt.
Introduce per-CPU flags that track the validity of SRR and HSRR
registers. These are cleared when returning from interrupt, when
using the registers for something else (e.g., OPAL calls), when
adjusting the return address or MSR of a context, and when context
switching (which changes the return address and MSR).
This improves the performance of interrupt returns.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Fold in fixup patch from Nick]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210617155116.2167984-5-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/Kconfig.debug')
-rw-r--r-- | arch/powerpc/Kconfig.debug | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index 6342f9da4545..3a8ce31a2ae6 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug @@ -85,6 +85,10 @@ config MSI_BITMAP_SELFTEST config PPC_IRQ_SOFT_MASK_DEBUG bool "Include extra checks for powerpc irq soft masking" +config PPC_RFI_SRR_DEBUG + bool "Include extra checks for RFI SRR register validity" + depends on PPC_BOOK3S_64 + config XMON bool "Include xmon kernel debugger" depends on DEBUG_KERNEL |