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| author | Michal Simek <michal.simek@xilinx.com> | 2020-05-21 16:55:52 +0000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-05-28 23:24:34 +1000 |
| commit | 7ade8495dcfd788a76e6877c9ea86f5207369ea4 (patch) | |
| tree | d00198541720234f9e5bca3a82c6710c5798502e /arch/powerpc/Kconfig.debug | |
| parent | 0bdad33d6bd7b80722e2f9e588d3d7c6d6e34978 (diff) | |
| download | lwn-7ade8495dcfd788a76e6877c9ea86f5207369ea4.tar.gz lwn-7ade8495dcfd788a76e6877c9ea86f5207369ea4.zip | |
powerpc: Remove Xilinx PPC405/PPC440 support
The latest Xilinx design tools called ISE and EDK has been released in
October 2013. New tool doesn't support any PPC405/PPC440 new designs.
These platforms are no longer supported and tested.
PowerPC 405/440 port is orphan from 2013 by
commit cdeb89943bfc ("MAINTAINERS: Fix incorrect status tag") and
commit 19624236cce1 ("MAINTAINERS: Update Grant's email address and maintainership")
that's why it is time to remove the support fot these platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/8c593895e2cb57d232d85ce4d8c3a1aa7f0869cc.1590079968.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch/powerpc/Kconfig.debug')
| -rw-r--r-- | arch/powerpc/Kconfig.debug | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index 0b063830eea8..b88900f4832f 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug @@ -230,7 +230,7 @@ config PPC_EARLY_DEBUG_40x help Select this to enable early debugging for IBM 40x chips via the inbuilt serial port. This works on chips with a 16550 compatible - UART. Xilinx chips with uartlite cannot use this option. + UART. config PPC_EARLY_DEBUG_CPM bool "Early serial debugging for Freescale CPM-based serial ports" |