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authorWu Zhangjin <wuzhangjin@gmail.com>2010-03-10 21:52:07 +0800
committerWu Zhangjin <wuzhangjin@gmail.com>2010-03-11 19:54:28 +0800
commita6310a884cd9bb469c6267554c3913ad8300b55c (patch)
treeec6fe9919fccc4e24a08cf625e3b5a75d6c43928 /arch/mips
parent6329865ed6774b1d1cb3ab585bce263b2babfcd4 (diff)
downloadlwn-a6310a884cd9bb469c6267554c3913ad8300b55c.tar.gz
lwn-a6310a884cd9bb469c6267554c3913ad8300b55c.zip
Loongson: make _rdmsr, _wrmsr be atomic
The _rdmsr, _wrdmsr operation must be atomic to ensure accessing the right msr address we want. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/pci/ops-loongson2.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c
index aa5d3da27212..98aa2f31d822 100644
--- a/arch/mips/pci/ops-loongson2.c
+++ b/arch/mips/pci/ops-loongson2.c
@@ -182,15 +182,22 @@ struct pci_ops loongson_pci_ops = {
};
#ifdef CONFIG_CS5536
+
+DEFINE_RAW_SPINLOCK(msr_lock);
+
void _rdmsr(u32 msr, u32 *hi, u32 *lo)
{
struct pci_bus bus = {
.number = PCI_BUS_CS5536
};
u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&msr_lock, flags);
loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+ raw_spin_unlock_irqrestore(&msr_lock, flags);
}
EXPORT_SYMBOL(_rdmsr);
@@ -200,9 +207,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
.number = PCI_BUS_CS5536
};
u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&msr_lock, flags);
loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
+ raw_spin_unlock_irqrestore(&msr_lock, flags);
}
EXPORT_SYMBOL(_wrmsr);
#endif