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author | Thomas Gleixner <tglx@linutronix.de> | 2015-07-30 00:13:24 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2015-07-30 00:13:24 +0200 |
commit | 4b979e4c611ce750d32b51737f837b485f43c69b (patch) | |
tree | 3bc56f2a22d2cf29bc183b67e74e1e8c0733efc0 /arch/mips/mti-malta/malta-time.c | |
parent | 1559f3b8d0527e24219149c95b3de5e7b2924828 (diff) | |
parent | cbfe8fa6cd672011c755c3cd85c9ffd4e2d10a6f (diff) | |
download | lwn-4b979e4c611ce750d32b51737f837b485f43c69b.tar.gz lwn-4b979e4c611ce750d32b51737f837b485f43c69b.zip |
Merge branch 'linus' into irq/core
Pull in upstream fixes before applying conflicting changes
Diffstat (limited to 'arch/mips/mti-malta/malta-time.c')
-rw-r--r-- | arch/mips/mti-malta/malta-time.c | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index 185e68261f45..5625b190edc0 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c @@ -119,18 +119,24 @@ void read_persistent_clock(struct timespec *ts) int get_c0_fdc_int(void) { - int mips_cpu_fdc_irq; + /* + * Some cores claim the FDC is routable through the GIC, but it doesn't + * actually seem to be connected for those Malta bitstreams. + */ + switch (current_cpu_type()) { + case CPU_INTERAPTIV: + case CPU_PROAPTIV: + return -1; + }; if (cpu_has_veic) - mips_cpu_fdc_irq = -1; + return -1; else if (gic_present) - mips_cpu_fdc_irq = gic_get_c0_fdc_int(); + return gic_get_c0_fdc_int(); else if (cp0_fdc_irq >= 0) - mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq; + return MIPS_CPU_IRQ_BASE + cp0_fdc_irq; else - mips_cpu_fdc_irq = -1; - - return mips_cpu_fdc_irq; + return -1; } int get_c0_perfcount_int(void) |