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| author | Huacai Chen <chenhc@lemote.com> | 2017-06-22 23:06:50 +0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2017-06-29 02:42:22 +0200 |
| commit | b392ee07999aa1f19b3a845fad47ec4275341f71 (patch) | |
| tree | 66882724f67f17cb2dd4d066a0a1024e6d088988 /arch/mips/loongson64 | |
| parent | 0a00024d7a779b283db2a02130ffa46f47634d0c (diff) | |
| download | lwn-b392ee07999aa1f19b3a845fad47ec4275341f71.tar.gz lwn-b392ee07999aa1f19b3a845fad47ec4275341f71.zip | |
MIPS: Loongson: Add NMI handler support
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@cavium.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16587/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson64')
| -rw-r--r-- | arch/mips/loongson64/common/init.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/loongson64/common/init.c b/arch/mips/loongson64/common/init.c index 9b987fe98b5b..6ef17120722f 100644 --- a/arch/mips/loongson64/common/init.c +++ b/arch/mips/loongson64/common/init.c @@ -10,13 +10,25 @@ #include <linux/bootmem.h> #include <asm/bootinfo.h> +#include <asm/traps.h> #include <asm/smp-ops.h> +#include <asm/cacheflush.h> #include <loongson.h> /* Loongson CPU address windows config space base address */ unsigned long __maybe_unused _loongson_addrwincfg_base; +static void __init mips_nmi_setup(void) +{ + void *base; + extern char except_vec_nmi; + + base = (void *)(CAC_BASE + 0x380); + memcpy(base, &except_vec_nmi, 0x80); + flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); +} + void __init prom_init(void) { #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG @@ -40,6 +52,7 @@ void __init prom_init(void) /*init the uart base address */ prom_init_uart_base(); register_smp_ops(&loongson3_smp_ops); + board_nmi_handler_setup = mips_nmi_setup; } void __init prom_free_prom_memory(void) |