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| author | Ralf Baechle <ralf@linux-mips.org> | 2005-12-08 14:04:24 +0000 |
|---|---|---|
| committer | <ralf@denk.linux-mips.net> | 2006-01-10 13:39:06 +0000 |
| commit | b4672d37293cb045ec4d57e8b76a62810c96da71 (patch) | |
| tree | 21ba827850d7bc7c36d7009575b979d12b35227c /arch/mips/kernel/time.c | |
| parent | e7958bb90d57f0da073cbd031a1808de51d1de15 (diff) | |
| download | lwn-b4672d37293cb045ec4d57e8b76a62810c96da71.tar.gz lwn-b4672d37293cb045ec4d57e8b76a62810c96da71.zip | |
MIPS: Introduce machinery for testing for MIPSxxR1/2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/time.c')
| -rw-r--r-- | arch/mips/kernel/time.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 174959bf1d59..07e125c027b2 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -628,9 +628,9 @@ void __init time_init(void) mips_hpt_init = c0_hpt_init; } - if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32R1) || - (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || - (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) + if (cpu_has_mips32r1 || cpu_has_mips32r2 || + (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || + (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) /* * We need to calibrate the counter but we don't have * 64-bit division. |