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| author | Ingo Molnar <mingo@kernel.org> | 2016-12-11 13:07:13 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2016-12-11 13:07:13 +0100 |
| commit | 6f38751510073cc054c5dffc3339b22f9385ceed (patch) | |
| tree | b7704b2d3388293118a6794f7a858e8891bcec60 /arch/mips/include | |
| parent | f4ec57b632fe15ed7a355099cb96ed4b647416de (diff) | |
| parent | 045169816b31b10faed984b01c390db1b32ee4c1 (diff) | |
| download | lwn-6f38751510073cc054c5dffc3339b22f9385ceed.tar.gz lwn-6f38751510073cc054c5dffc3339b22f9385ceed.zip | |
Merge branch 'linus' into locking/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 6 | ||||
| -rw-r--r-- | arch/mips/include/asm/tlb.h | 13 |
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 7dd2dd47909a..df78b2ca70eb 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -215,6 +215,12 @@ #endif /* + * Wired register bits + */ +#define MIPSR6_WIRED_LIMIT (_ULCAST_(0xffff) << 16) +#define MIPSR6_WIRED_WIRED (_ULCAST_(0xffff) << 0) + +/* * Values used for computation of new tlb entries */ #define PL_4K 12 diff --git a/arch/mips/include/asm/tlb.h b/arch/mips/include/asm/tlb.h index 4a2349302b55..dd179fd8acda 100644 --- a/arch/mips/include/asm/tlb.h +++ b/arch/mips/include/asm/tlb.h @@ -1,6 +1,9 @@ #ifndef __ASM_TLB_H #define __ASM_TLB_H +#include <asm/cpu-features.h> +#include <asm/mipsregs.h> + /* * MIPS doesn't need any special per-pte or per-vma handling, except * we need to flush cache for area to be unmapped. @@ -22,6 +25,16 @@ ((CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) | \ (cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0)) +static inline unsigned int num_wired_entries(void) +{ + unsigned int wired = read_c0_wired(); + + if (cpu_has_mips_r6) + wired &= MIPSR6_WIRED_WIRED; + + return wired; +} + #include <asm-generic/tlb.h> #endif /* __ASM_TLB_H */ |