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| author | Nikolay Martynov <mar.kolya@gmail.com> | 2015-12-08 13:27:02 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-09 12:00:00 +0200 |
| commit | e03ac9f0c3f5f2e79c41fd02d9b90831dfd78a2e (patch) | |
| tree | c4fd844d263bcf7355ee3edad482ad4188fd07eb /arch/mips/include/asm/mips-cm.h | |
| parent | 44549e8f5eea4e0a41b487b63e616cb089922b99 (diff) | |
| download | lwn-e03ac9f0c3f5f2e79c41fd02d9b90831dfd78a2e.tar.gz lwn-e03ac9f0c3f5f2e79c41fd02d9b90831dfd78a2e.zip | |
mips: Fix CPC_BASE_ADDR mask to match datasheet
According to 'MIPS32® interAptivTM Multiprocessing
System Programmer’s Guide' CPC_BASE_ADDR takes bits [31:15].
This change is tested ith mt7621 which wasn't working without it.
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11766/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mips-cm.h')
| -rw-r--r-- | arch/mips/include/asm/mips-cm.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h index d4635391c36a..4ac8e4b69fb5 100644 --- a/arch/mips/include/asm/mips-cm.h +++ b/arch/mips/include/asm/mips-cm.h @@ -290,8 +290,8 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80) #define CM_GCR_GIC_BASE_GICEN_MSK (_ULCAST_(0x1) << 0) /* GCR_CPC_BASE register fields */ -#define CM_GCR_CPC_BASE_CPCBASE_SHF 17 -#define CM_GCR_CPC_BASE_CPCBASE_MSK (_ULCAST_(0x7fff) << 17) +#define CM_GCR_CPC_BASE_CPCBASE_SHF 15 +#define CM_GCR_CPC_BASE_CPCBASE_MSK (_ULCAST_(0x1ffff) << 15) #define CM_GCR_CPC_BASE_CPCEN_SHF 0 #define CM_GCR_CPC_BASE_CPCEN_MSK (_ULCAST_(0x1) << 0) |