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authorRalf Baechle <ralf@linux-mips.org>2009-04-25 11:25:34 +0200
committerRalf Baechle <ralf@linux-mips.org>2009-05-14 13:50:29 +0100
commitbb86bf28aec6d0a207ae09f38a43e94133d4d6db (patch)
tree34bd8f653eb10dc4eb82aa8ef2576475346070e1 /arch/mips/include/asm/fixmap.h
parent0b54352600b820a6d25f151cbd8975ed9b2aeb09 (diff)
downloadlwn-bb86bf28aec6d0a207ae09f38a43e94133d4d6db.tar.gz
lwn-bb86bf28aec6d0a207ae09f38a43e94133d4d6db.zip
MIPS: Fix highmem.
Commit 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) rsp. b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (linux-mips.org): > From: Chris Dearman <chris@mips.com> > Date: Wed, 19 Sep 2007 00:58:24 +0100 > Subject: [PATCH] [MIPS] Allow setting of the cache attribute at run time. > > Slightly tacky, but there is a precedent in the sparc archirecture code. introduces the variable _page_cachable_default, which defaults to zero and. is used to create the prototype PTE for __kmap_atomic in arch/mips/mm/init.c:kmap_init before initialization in arch/mips/mm/c-r4k.c:coherency_setup, so the default value of 0 will be used as the CCA of kmap atomic pages which on many processors is not a defined CCA value and may result in writes to kmap_atomic pages getting corrupted. Debugged by Jon Fraser (jfraser@broadcom.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/fixmap.h')
-rw-r--r--arch/mips/include/asm/fixmap.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/include/asm/fixmap.h b/arch/mips/include/asm/fixmap.h
index 9cc8522a394f..0f5caa1307f1 100644
--- a/arch/mips/include/asm/fixmap.h
+++ b/arch/mips/include/asm/fixmap.h
@@ -108,6 +108,9 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
return __virt_to_fix(vaddr);
}
+#define kmap_get_fixmap_pte(vaddr) \
+ pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
+
/*
* Called from pgtable_init()
*/