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authorPaul Burton <paul.burton@imgtec.com>2014-05-07 12:20:56 +0100
committerRalf Baechle <ralf@linux-mips.org>2014-05-30 21:01:08 +0200
commit643c5705bc9d30b64ca320715eb210b853d1f27e (patch)
tree714c8f163d64dfe4fc35b37d02a234af6779fa53 /arch/mips/Kconfig
parent76ad023b8925d8b849a9377b77bcfa9a49f57082 (diff)
downloadlwn-643c5705bc9d30b64ca320715eb210b853d1f27e.tar.gz
lwn-643c5705bc9d30b64ca320715eb210b853d1f27e.zip
MIPS: Define some more PIIX4 registers & values
This patch simply adds definitions for some I/O registers in the PIIX4 PM device, and the magic data for a special cycle which must occur on the PCI bus in order for the PIIX4 to enter a suspend state. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6903/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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