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author | Huacai Chen <chenhuacai@loongson.cn> | 2023-06-29 20:58:44 +0800 |
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committer | Huacai Chen <chenhuacai@loongson.cn> | 2023-06-29 20:58:44 +0800 |
commit | 01158487af60cd3915e8c31924144caf29cb0767 (patch) | |
tree | 01bdd88063128e646a6fdc394a9c2d8c7a138316 /arch/loongarch/include/uapi/asm | |
parent | e031a5f3f1eddb961a6ded8a21ab8189d8760860 (diff) | |
download | lwn-01158487af60cd3915e8c31924144caf29cb0767.tar.gz lwn-01158487af60cd3915e8c31924144caf29cb0767.zip |
LoongArch: Introduce hardware page table walker
Loongson-3A6000 and newer processors have hardware page table walker
(PTW) support. PTW can handle all fastpaths of TLBI/TLBL/TLBS/TLBM
exceptions by hardware, software only need to handle slowpaths (page
faults).
BTW, PTW doesn't append _PAGE_MODIFIED for page table entries, so we
change pmd_dirty() and pte_dirty() to also check _PAGE_DIRTY for the
"dirty" attribute.
Signed-off-by: Liang Gao <gaoliang@loongson.cn>
Signed-off-by: Jun Yi <yijun@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/include/uapi/asm')
-rw-r--r-- | arch/loongarch/include/uapi/asm/hwcap.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/loongarch/include/uapi/asm/hwcap.h b/arch/loongarch/include/uapi/asm/hwcap.h index 8840b72fa8e8..6955a7cb2c65 100644 --- a/arch/loongarch/include/uapi/asm/hwcap.h +++ b/arch/loongarch/include/uapi/asm/hwcap.h @@ -16,5 +16,6 @@ #define HWCAP_LOONGARCH_LBT_X86 (1 << 10) #define HWCAP_LOONGARCH_LBT_ARM (1 << 11) #define HWCAP_LOONGARCH_LBT_MIPS (1 << 12) +#define HWCAP_LOONGARCH_PTW (1 << 13) #endif /* _UAPI_ASM_HWCAP_H */ |