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| author | Davidlohr Bueso <dave@stgolabs.net> | 2015-10-27 12:53:49 -0700 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-12-04 11:39:51 +0100 |
| commit | d5a73cadf3fdec95e9518ee5bb91bd0747c42b30 (patch) | |
| tree | 21208b866d0c81807f80da18177ea327c103e28c /arch/ia64 | |
| parent | fbd35c0d2fb41b75863a0e45fe939c8440375b0a (diff) | |
| download | lwn-d5a73cadf3fdec95e9518ee5bb91bd0747c42b30.tar.gz lwn-d5a73cadf3fdec95e9518ee5bb91bd0747c42b30.zip | |
lcoking/barriers, arch: Use smp barriers in smp_store_release()
With commit b92b8b35a2e ("locking/arch: Rename set_mb() to smp_store_mb()")
it was made clear that the context of this call (and thus set_mb)
is strictly for CPU ordering, as opposed to IO. As such all archs
should use the smp variant of mb(), respecting the semantics and
saving a mandatory barrier on UP.
Signed-off-by: Davidlohr Bueso <dbueso@suse.de>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: <linux-arch@vger.kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: dave@stgolabs.net
Link: http://lkml.kernel.org/r/1445975631-17047-3-git-send-email-dave@stgolabs.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/ia64')
| -rw-r--r-- | arch/ia64/include/asm/barrier.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ia64/include/asm/barrier.h b/arch/ia64/include/asm/barrier.h index df896a1c41d3..209c4b817c95 100644 --- a/arch/ia64/include/asm/barrier.h +++ b/arch/ia64/include/asm/barrier.h @@ -77,7 +77,7 @@ do { \ ___p1; \ }) -#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); mb(); } while (0) +#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); smp_mb(); } while (0) /* * The group barrier in front of the rsm & ssm are necessary to ensure |