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| author | Richard Kuo <rkuo@codeaurora.org> | 2012-03-27 17:38:09 -0500 |
|---|---|---|
| committer | Richard Kuo <rkuo@codeaurora.org> | 2013-04-30 19:40:23 -0500 |
| commit | 60c4ba99e015afe879c2682967c8ca8d233f6d3c (patch) | |
| tree | ddf41e569dd852c627ad8008b756d224694861c5 /arch/hexagon/kernel/asm-offsets.c | |
| parent | 444dd742d3b0353c55c92f77e6732d932120c829 (diff) | |
| download | lwn-60c4ba99e015afe879c2682967c8ca8d233f6d3c.tar.gz lwn-60c4ba99e015afe879c2682967c8ca8d233f6d3c.zip | |
Hexagon: add support for new v4+ registers
Add support for a couple new v4+ registers, along with
newer save/restore pt_regs.
Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
Diffstat (limited to 'arch/hexagon/kernel/asm-offsets.c')
| -rw-r--r-- | arch/hexagon/kernel/asm-offsets.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/hexagon/kernel/asm-offsets.c b/arch/hexagon/kernel/asm-offsets.c index 2d5e84d3b00d..181515ba825d 100644 --- a/arch/hexagon/kernel/asm-offsets.c +++ b/arch/hexagon/kernel/asm-offsets.c @@ -44,7 +44,8 @@ int main(void) COMMENT("Hexagon pt_regs definitions"); OFFSET(_PT_SYSCALL_NR, pt_regs, syscall_nr); - OFFSET(_PT_UGPGP, pt_regs, ugpgp); + OFFSET(_PT_GPUGP, pt_regs, gpugp); + OFFSET(_PT_CS1CS0, pt_regs, cs1cs0); OFFSET(_PT_R3130, pt_regs, r3130); OFFSET(_PT_R2928, pt_regs, r2928); OFFSET(_PT_R2726, pt_regs, r2726); |