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authorIngo Molnar <mingo@elte.hu>2008-07-28 15:07:54 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-28 15:07:54 +0200
commita403e45c3b678211ee3b7225dbb924921fb5ddd3 (patch)
tree6526d8d3c46f2443c7836bf094366179a57e7aad /arch/blackfin/mach-bf537/head.S
parenta05d2ebab28011c2f3f520833f4bfdd2fd1b9c02 (diff)
parentd974ae379a2fbe8948f01eabbc6b19c0a80f09bc (diff)
downloadlwn-a403e45c3b678211ee3b7225dbb924921fb5ddd3.tar.gz
lwn-a403e45c3b678211ee3b7225dbb924921fb5ddd3.zip
Merge core/lib: pick up memparse() change.
Merge branch 'core/lib' into x86/xen
Diffstat (limited to 'arch/blackfin/mach-bf537/head.S')
-rw-r--r--arch/blackfin/mach-bf537/head.S12
1 files changed, 3 insertions, 9 deletions
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index 48cd58a410a0..6b019eaee0b6 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -32,7 +32,7 @@
#include <asm/blackfin.h>
#include <asm/trace.h>
-#if CONFIG_BFIN_KERNEL_CLOCK
+#ifdef CONFIG_BFIN_KERNEL_CLOCK
#include <asm/mach-common/clocks.h>
#include <asm/mach/mem_init.h>
#endif
@@ -217,7 +217,7 @@ ENTRY(__start)
/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
call _bf53x_relocate_l1_mem;
-#if CONFIG_BFIN_KERNEL_CLOCK
+#ifdef CONFIG_BFIN_KERNEL_CLOCK
call _start_dma_code;
#endif
@@ -350,7 +350,7 @@ ENDPROC(_real_start)
__FINIT
.section .l1.text
-#if CONFIG_BFIN_KERNEL_CLOCK
+#ifdef CONFIG_BFIN_KERNEL_CLOCK
ENTRY(_start_dma_code)
/* Enable PHY CLK buffer output */
@@ -430,12 +430,6 @@ ENTRY(_start_dma_code)
w[p0] = r0.l;
ssync;
- p0.l = LO(EBIU_SDBCTL);
- p0.h = HI(EBIU_SDBCTL); /* SDRAM Memory Bank Control Register */
- r0 = mem_SDBCTL;
- w[p0] = r0.l;
- ssync;
-
P2.H = hi(EBIU_SDGCTL);
P2.L = lo(EBIU_SDGCTL);
R0 = [P2];