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authorArnd Bergmann <arnd@arndb.de>2018-03-27 15:45:03 +0200
committerArnd Bergmann <arnd@arndb.de>2018-03-27 15:45:03 +0200
commit59162c936692ff064c12676e708c8ef82a82436d (patch)
tree1e3c4f07e77fe8144cd396febfc2def122fc02b7 /arch/arm
parent8650b9feb0d8e7e9cc79ca118e1bb606188de899 (diff)
parent01d675f159e0f0792947fb823cf2425da4d747ad (diff)
downloadlwn-59162c936692ff064c12676e708c8ef82a82436d.tar.gz
lwn-59162c936692ff064c12676e708c8ef82a82436d.zip
Merge tag 'renesas-soc-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Pull "Renesas ARM Based SoC Updates for v4.17" from Simon Horman: 01d675f159e0 ARM: shmobile: rcar-gen2: Add watchdog support 58adf1ba0d22 ARM: shmobile: Add watchdog support * SoC - Identify R-Car V3H (r8a77980) and M3N (r8a77965) - Enable R-Car Gen2 regulator quirk for Stout board with H3 (r8a7790) SoC Marek Vaust says "Regulator setup is suboptimal on H2 Stout too. The Stout newly has two DA9210 regulators, so the quirk is extended to handle another DA9210 at i2c address 0x70." - Add watchdog support This is the SoC portion of the following solution. It is not yet enabled in DT as it is not functional without clock dependencies in place. Fabrizio Castro says "this series has been around for some time as RFC, and it has collected useful comments from the community along the way. The solution proposed by this patch set works for most R-Car Gen2 and RZ/G1 devices, but not all of them. We now know that for some R-Car Gen2 early revisions there is no proper software fix. Anyway, no product has been built around early revisions, but development boards mounting early revisions (basically prototypes) are still out there. As a result, this series isn't enabling the internal watchdog on R-Car Gen2 boards, developers may enable it in board specific device trees if needed. This series has been tested by me on the iwg20d, iwg22d, Lager, Alt, and Koelsch boards. The problem =========== To deal with SMP on R-Car Gen2 and RZ/G1, we install a reset vector to ICRAM1 and we program the [S]BAR registers so that when we turn ON the non-boot CPUs they are redirected to the reset vector installed by Linux in ICRAM1, and eventually they continue the execution to RAM, where the SMP bring-up code will take care of the rest. The content of the [S]BAR registers survives a watchdog triggered reset, and as such after the watchdog fires the boot core will try and execute the SMP bring-up code instead of jumping to the bootrom code. The fix ======= The main strategy for the solution is to let the reset vector decide if it needs to jump to shmobile_boot_fn or to the bootrom code. In a watchdog triggered reset scenario, since the [S]BAR registers keep their values, the boot CPU will jump into the newly designed reset vector, the assembly routine will eventually test WOVF (a bit in register RWTCSRA that indicates if the watchdog counter has overflown, the value of this bit gets retained in this scenario), and jump to the bootrom code which will in turn load up the bootloader, etc. When bringing up SMP or using CPU hotplug, the reset vector will jump to shmobile_boot_fn instead." * R-Car Rst - Add support for R-Car V3H (r8a77980) and V3H (r8a77980) * R-Car SYSC - Mark rcar_sysc_matches[] __initconst Geert Uytterhoeven says "This frees another 1764 bytes (arm32/shmobile_defconfig) or 1000 bytes (arm64/renesas_defconfig) of memory after kernel init." - Fix power area parents Sergei Shtylyov says "According to the figure 9.2(b) of the R-Car Series, 3rd Generation User’s Manual: Hardware Rev. 0.80 the A2IRn and A2SCn power areas in R8A77970 have the A3IR area as a parent, thus the SYSC driver has those parents wrong.." - Add support for R-Car V3H (r8a77980) and V3H (r8a77980) * tag 'renesas-soc-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: rcar-gen2: Add watchdog support ARM: shmobile: Add watchdog support ARM: shmobile: rcar-gen2: Fix error check in regulator quirk soc: renesas: rcar-rst: Add support for R-Car M3-N ARM: shmobile: stout: enable R-Car Gen2 regulator quirk soc: renesas: rcar-sysc: Add R-Car M3-N support soc: renesas: Identify R-Car M3-N soc: renesas: rcar-sysc: add R8A77980 support dt-bindings: power: add R8A77980 SYSC power domain definitions soc: renesas: r8a77970-sysc: fix power area parents soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2 soc: renesas: rcar-rst: add R8A77980 support soc: renesas: identify R-Car V3H soc: renesas: rcar-sysc: Mark rcar_sysc_matches[] __initconst
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-shmobile/common.h4
-rw-r--r--arch/arm/mach-shmobile/headsmp.S55
-rw-r--r--arch/arm/mach-shmobile/platsmp-apmu.c1
-rw-r--r--arch/arm/mach-shmobile/pm-rcar-gen2.c15
-rw-r--r--arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c25
5 files changed, 89 insertions, 11 deletions
diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h
index a8fa4f7e1f60..43c1ac696274 100644
--- a/arch/arm/mach-shmobile/common.h
+++ b/arch/arm/mach-shmobile/common.h
@@ -7,6 +7,10 @@ extern void shmobile_init_delay(void);
extern void shmobile_boot_vector(void);
extern unsigned long shmobile_boot_fn;
extern unsigned long shmobile_boot_size;
+extern void shmobile_boot_vector_gen2(void);
+extern unsigned long shmobile_boot_fn_gen2;
+extern unsigned long shmobile_boot_cpu_gen2;
+extern unsigned long shmobile_boot_size_gen2;
extern void shmobile_smp_boot(void);
extern void shmobile_smp_sleep(void);
extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
index 32e0bf6e3ccb..cef8e8c555f8 100644
--- a/arch/arm/mach-shmobile/headsmp.S
+++ b/arch/arm/mach-shmobile/headsmp.S
@@ -16,6 +16,11 @@
#include <asm/assembler.h>
#include <asm/memory.h>
+#define SCTLR_MMU 0x01
+#define BOOTROM_ADDRESS 0xE6340000
+#define RWTCSRA_ADDRESS 0xE6020004
+#define RWTCSRA_WOVF 0x10
+
/*
* Reset vector for secondary CPUs.
* This will be mapped at address 0 by SBAR register.
@@ -37,6 +42,56 @@ shmobile_boot_fn:
shmobile_boot_size:
.long . - shmobile_boot_vector
+#ifdef CONFIG_ARCH_RCAR_GEN2
+/*
+ * Reset vector for R-Car Gen2 and RZ/G1 secondary CPUs.
+ * This will be mapped at address 0 by SBAR register.
+ */
+ENTRY(shmobile_boot_vector_gen2)
+ mrc p15, 0, r0, c0, c0, 5 @ r0 = MPIDR
+ ldr r1, shmobile_boot_cpu_gen2
+ cmp r0, r1
+ bne shmobile_smp_continue_gen2
+
+ mrc p15, 0, r1, c1, c0, 0 @ r1 = SCTLR
+ and r0, r1, #SCTLR_MMU
+ cmp r0, #SCTLR_MMU
+ beq shmobile_smp_continue_gen2
+
+ ldr r0, rwtcsra
+ mov r1, #0
+ ldrb r1, [r0]
+ and r0, r1, #RWTCSRA_WOVF
+ cmp r0, #RWTCSRA_WOVF
+ bne shmobile_smp_continue_gen2
+
+ ldr r0, bootrom
+ bx r0
+
+shmobile_smp_continue_gen2:
+ ldr r1, shmobile_boot_fn_gen2
+ bx r1
+
+ENDPROC(shmobile_boot_vector_gen2)
+
+ .align 4
+rwtcsra:
+ .word RWTCSRA_ADDRESS
+bootrom:
+ .word BOOTROM_ADDRESS
+ .globl shmobile_boot_cpu_gen2
+shmobile_boot_cpu_gen2:
+ .word 0x00000000
+
+ .align 2
+ .globl shmobile_boot_fn_gen2
+shmobile_boot_fn_gen2:
+ .space 4
+ .globl shmobile_boot_size_gen2
+shmobile_boot_size_gen2:
+ .long . - shmobile_boot_vector_gen2
+#endif /* CONFIG_ARCH_RCAR_GEN2 */
+
/*
* Per-CPU SMP boot function/argument selection code based on MPIDR
*/
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index 4422b615a6ee..ba732effc90b 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -191,6 +191,7 @@ static void __init shmobile_smp_apmu_setup_boot(void)
{
/* install boot code shared by all CPUs */
shmobile_boot_fn = __pa_symbol(shmobile_smp_boot);
+ shmobile_boot_fn_gen2 = shmobile_boot_fn;
}
void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index e5f215c8b218..5a798b406af0 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -17,6 +17,7 @@
#include <linux/smp.h>
#include <linux/soc/renesas/rcar-sysc.h>
#include <asm/io.h>
+#include <asm/cputype.h>
#include "common.h"
#include "rcar-gen2.h"
@@ -37,7 +38,6 @@
#define CA7RESCNT_CODE 0x5a5a0000
#define CA7RESCNT_CPUS 0xf /* CPU0-3 */
-
/* On-chip RAM */
#define ICRAM1 0xe63c0000 /* Inter Connect RAM1 (4 KiB) */
@@ -119,8 +119,17 @@ map:
p = ioremap(res.start, resource_size(&res));
if (!p)
return;
-
- memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+ /*
+ * install the reset vector, use the largest version if we have enough
+ * memory available
+ */
+ if (resource_size(&res) >= shmobile_boot_size_gen2) {
+ shmobile_boot_cpu_gen2 = read_cpuid_mpidr();
+ memcpy_toio(p, shmobile_boot_vector_gen2,
+ shmobile_boot_size_gen2);
+ } else {
+ memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+ }
iounmap(p);
/* setup reset vectors */
diff --git a/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c b/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
index 44438f344dc8..93f628acfd94 100644
--- a/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c
@@ -1,9 +1,9 @@
/*
* R-Car Generation 2 da9063/da9210 regulator quirk
*
- * The r8a7790/lager and r8a7791/koelsch development boards have da9063 and
- * da9210 regulators. Both regulators have their interrupt request lines tied
- * to the same interrupt pin (IRQ2) on the SoC.
+ * Certain Gen2 development boards have an da9063 and one or more da9210
+ * regulators. All of these regulators have their interrupt request lines
+ * tied to the same interrupt pin (IRQ2) on the SoC.
*
* After cold boot or da9063-induced restart, both the da9063 and da9210 seem
* to assert their interrupt request lines. Hence as soon as one driver
@@ -50,7 +50,7 @@ static void __iomem *irqc;
static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
-static struct i2c_msg da9xxx_msgs[2] = {
+static struct i2c_msg da9xxx_msgs[3] = {
{
.addr = 0x58,
.len = ARRAY_SIZE(da9063_irq_clr),
@@ -59,6 +59,10 @@ static struct i2c_msg da9xxx_msgs[2] = {
.addr = 0x68,
.len = ARRAY_SIZE(da9210_irq_clr),
.buf = da9210_irq_clr,
+ }, {
+ .addr = 0x70,
+ .len = ARRAY_SIZE(da9210_irq_clr),
+ .buf = da9210_irq_clr,
},
};
@@ -85,12 +89,16 @@ static int regulator_quirk_notify(struct notifier_block *nb,
dev_dbg(dev, "Detected %s\n", client->name);
if ((client->addr == 0x58 && !strcmp(client->name, "da9063")) ||
- (client->addr == 0x68 && !strcmp(client->name, "da9210"))) {
- int ret;
+ (client->addr == 0x68 && !strcmp(client->name, "da9210")) ||
+ (client->addr == 0x70 && !strcmp(client->name, "da9210"))) {
+ int ret, len;
+
+ /* There are two DA9210 on Stout, one on the other boards. */
+ len = of_machine_is_compatible("renesas,stout") ? 3 : 2;
dev_info(&client->dev, "clearing da9063/da9210 interrupts\n");
- ret = i2c_transfer(client->adapter, da9xxx_msgs, ARRAY_SIZE(da9xxx_msgs));
- if (ret != ARRAY_SIZE(da9xxx_msgs))
+ ret = i2c_transfer(client->adapter, da9xxx_msgs, len);
+ if (ret != len)
dev_err(&client->dev, "i2c error %d\n", ret);
}
@@ -118,6 +126,7 @@ static int __init rcar_gen2_regulator_quirk(void)
if (!of_machine_is_compatible("renesas,koelsch") &&
!of_machine_is_compatible("renesas,lager") &&
+ !of_machine_is_compatible("renesas,stout") &&
!of_machine_is_compatible("renesas,gose"))
return -ENODEV;