diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2012-04-02 14:39:26 +0800 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2012-05-11 15:08:24 +0800 |
commit | 0c456cfa7ef3f02cb077a2883bd9f5ad1cde3761 (patch) | |
tree | a213511b6c35024e682a3e35205ee670a7bba399 /arch/arm | |
parent | 4592a96591f1659d910b46101d3f425263cfb0df (diff) | |
download | lwn-0c456cfa7ef3f02cb077a2883bd9f5ad1cde3761.tar.gz lwn-0c456cfa7ef3f02cb077a2883bd9f5ad1cde3761.zip |
ARM: imx: rename uart and fec device tree nodes
It has been pointed out by device tree maintainer for several times
that the generic names 'serial' and 'ethernet' should be used for
those devices per ePAPR. Renames imx uart and fec device tree nodes
to stop them being bad examples.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/imx27-phytec-phycore.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx27.dtsi | 14 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx51-babbage.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx51.dtsi | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-ard.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-evk.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-qsb.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53-smd.dts | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx53.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q-arm2.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q-sabrelite.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/mach-imx/clk-imx6q.c | 22 |
13 files changed, 55 insertions, 55 deletions
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts index a51a08fc2af9..2b0ff60247a4 100644 --- a/arch/arm/boot/dts/imx27-phytec-phycore.dts +++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts @@ -27,22 +27,22 @@ status = "okay"; }; - uart@1000a000 { + serial@1000a000 { fsl,uart-has-rtscts; status = "okay"; }; - uart@1000b000 { + serial@1000b000 { fsl,uart-has-rtscts; status = "okay"; }; - uart@1000c000 { + serial@1000c000 { fsl,uart-has-rtscts; status = "okay"; }; - fec@1002b000 { + ethernet@1002b000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index bc5e7d5ddd54..2b1a166d41f9 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -59,28 +59,28 @@ status = "disabled"; }; - uart1: uart@1000a000 { + uart1: serial@1000a000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1000a000 0x1000>; interrupts = <20>; status = "disabled"; }; - uart2: uart@1000b000 { + uart2: serial@1000b000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1000b000 0x1000>; interrupts = <19>; status = "disabled"; }; - uart3: uart@1000c000 { + uart3: serial@1000c000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1000c000 0x1000>; interrupts = <18>; status = "disabled"; }; - uart4: uart@1000d000 { + uart4: serial@1000d000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1000d000 0x1000>; interrupts = <17>; @@ -183,14 +183,14 @@ status = "disabled"; }; - uart5: uart@1001b000 { + uart5: serial@1001b000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1001b000 0x1000>; interrupts = <49>; status = "disabled"; }; - uart6: uart@1001c000 { + uart6: serial@1001c000 { compatible = "fsl,imx27-uart", "fsl,imx21-uart"; reg = <0x1001c000 0x1000>; interrupts = <48>; @@ -206,7 +206,7 @@ status = "disabled"; }; - fec: fec@1002b000 { + fec: ethernet@1002b000 { compatible = "fsl,imx27-fec"; reg = <0x1002b000 0x4000>; interrupts = <50>; diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index fd729d459d9a..d42a404c0cef 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -36,7 +36,7 @@ status = "okay"; }; - uart3: uart@7000c000 { + uart3: serial@7000c000 { fsl,uart-has-rtscts; status = "okay"; }; @@ -173,12 +173,12 @@ reg = <0x73fa8000 0x4000>; }; - uart1: uart@73fbc000 { + uart1: serial@73fbc000 { fsl,uart-has-rtscts; status = "okay"; }; - uart2: uart@73fc0000 { + uart2: serial@73fc0000 { status = "okay"; }; }; @@ -197,7 +197,7 @@ }; }; - fec@83fec000 { + ethernet@83fec000 { phy-mode = "mii"; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 6663986fe1c8..66f0ebd84174 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -86,7 +86,7 @@ status = "disabled"; }; - uart3: uart@7000c000 { + uart3: serial@7000c000 { compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x7000c000 0x4000>; interrupts = <33>; @@ -171,14 +171,14 @@ status = "disabled"; }; - uart1: uart@73fbc000 { + uart1: serial@73fbc000 { compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x73fbc000 0x4000>; interrupts = <31>; status = "disabled"; }; - uart2: uart@73fc0000 { + uart2: serial@73fc0000 { compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x73fc0000 0x4000>; interrupts = <32>; @@ -235,7 +235,7 @@ status = "disabled"; }; - fec@83fec000 { + ethernet@83fec000 { compatible = "fsl,imx51-fec", "fsl,imx27-fec"; reg = <0x83fec000 0x4000>; interrupts = <87>; diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts index 4c61b7f98578..5b8eafcdbeec 100644 --- a/arch/arm/boot/dts/imx53-ard.dts +++ b/arch/arm/boot/dts/imx53-ard.dts @@ -40,7 +40,7 @@ reg = <0x53fa8000 0x4000>; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts index 8ce5fe14a226..9c798034675e 100644 --- a/arch/arm/boot/dts/imx53-evk.dts +++ b/arch/arm/boot/dts/imx53-evk.dts @@ -71,7 +71,7 @@ reg = <0x53fa8000 0x4000>; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { status = "okay"; }; }; @@ -95,7 +95,7 @@ }; }; - fec@63fec000 { + ethernet@63fec000 { phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 0>; status = "okay"; diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts index de34a1740581..b08b5874da6e 100644 --- a/arch/arm/boot/dts/imx53-qsb.dts +++ b/arch/arm/boot/dts/imx53-qsb.dts @@ -45,7 +45,7 @@ reg = <0x53fa8000 0x4000>; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { status = "okay"; }; }; @@ -78,7 +78,7 @@ }; }; - fec@63fec000 { + ethernet@63fec000 { phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 0>; status = "okay"; diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts index a984fa508a0c..a3529afc4d20 100644 --- a/arch/arm/boot/dts/imx53-smd.dts +++ b/arch/arm/boot/dts/imx53-smd.dts @@ -35,7 +35,7 @@ status = "okay"; }; - uart3: uart@5000c000 { + uart3: serial@5000c000 { fsl,uart-has-rtscts; status = "okay"; }; @@ -86,11 +86,11 @@ reg = <0x53fa8000 0x4000>; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { status = "okay"; }; - uart2: uart@53fc0000 { + uart2: serial@53fc0000 { status = "okay"; }; }; @@ -138,7 +138,7 @@ }; }; - fec@63fec000 { + ethernet@63fec000 { phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 0>; status = "okay"; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 5dd91b942c91..5188615b5170 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -88,7 +88,7 @@ status = "disabled"; }; - uart3: uart@5000c000 { + uart3: serial@5000c000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x5000c000 0x4000>; interrupts = <33>; @@ -173,14 +173,14 @@ status = "disabled"; }; - uart1: uart@53fbc000 { + uart1: serial@53fbc000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53fbc000 0x4000>; interrupts = <31>; status = "disabled"; }; - uart2: uart@53fc0000 { + uart2: serial@53fc0000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53fc0000 0x4000>; interrupts = <32>; @@ -226,7 +226,7 @@ status = "disabled"; }; - uart4: uart@53ff0000 { + uart4: serial@53ff0000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x53ff0000 0x4000>; interrupts = <13>; @@ -241,7 +241,7 @@ reg = <0x60000000 0x10000000>; ranges; - uart5: uart@63f90000 { + uart5: serial@63f90000 { compatible = "fsl,imx53-uart", "fsl,imx21-uart"; reg = <0x63f90000 0x4000>; interrupts = <86>; @@ -290,7 +290,7 @@ status = "disabled"; }; - fec@63fec000 { + ethernet@63fec000 { compatible = "fsl,imx53-fec", "fsl,imx25-fec"; reg = <0x63fec000 0x4000>; interrupts = <87>; diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index 1b2b64fd1205..9c468d2338f3 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts @@ -23,7 +23,7 @@ soc { aips-bus@02100000 { /* AIPS2 */ - enet@02188000 { + ethernet@02188000 { phy-mode = "rgmii"; local-mac-address = [00 04 9F 01 1B 61]; status = "okay"; @@ -42,7 +42,7 @@ status = "okay"; }; - uart4: uart@021f0000 { + uart4: serial@021f0000 { status = "okay"; }; }; diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 4663a4e5a285..a93c593fed8f 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -23,7 +23,7 @@ soc { aips-bus@02100000 { /* AIPS2 */ - enet@02188000 { + ethernet@02188000 { phy-mode = "rgmii"; phy-reset-gpios = <&gpio3 23 0>; status = "okay"; @@ -43,7 +43,7 @@ status = "okay"; }; - uart2: uart@021e8000 { + uart2: serial@021e8000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 68f2e429416a..56c5304e4cbc 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -165,7 +165,7 @@ status = "disabled"; }; - uart1: uart@02020000 { + uart1: serial@02020000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x02020000 0x4000>; interrupts = <0 26 0x04>; @@ -506,7 +506,7 @@ reg = <0x0217c000 0x4000>; }; - enet@02188000 { + ethernet@02188000 { compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; @@ -627,28 +627,28 @@ interrupts = <0 18 0x04>; }; - uart2: uart@021e8000 { + uart2: serial@021e8000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021e8000 0x4000>; interrupts = <0 27 0x04>; status = "disabled"; }; - uart3: uart@021ec000 { + uart3: serial@021ec000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021ec000 0x4000>; interrupts = <0 28 0x04>; status = "disabled"; }; - uart4: uart@021f0000 { + uart4: serial@021f0000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021f0000 0x4000>; interrupts = <0 29 0x04>; status = "disabled"; }; - uart5: uart@021f4000 { + uart5: serial@021f4000 { compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021f4000 0x4000>; interrupts = <0 30 0x04>; diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index f40a35da2e5c..b37ad4bc203a 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -392,17 +392,17 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); clk_register_clkdev(clk[twd], NULL, "smp_twd"); clk_register_clkdev(clk[usboh3], NULL, "usboh3"); - clk_register_clkdev(clk[uart_serial], "per", "2020000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.uart"); - clk_register_clkdev(clk[uart_serial], "per", "21e8000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.uart"); - clk_register_clkdev(clk[uart_serial], "per", "21ec000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.uart"); - clk_register_clkdev(clk[uart_serial], "per", "21f0000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.uart"); - clk_register_clkdev(clk[uart_serial], "per", "21f4000.uart"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.uart"); - clk_register_clkdev(clk[enet], NULL, "2188000.enet"); + clk_register_clkdev(clk[uart_serial], "per", "2020000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial"); + clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.serial"); + clk_register_clkdev(clk[uart_serial], "per", "21ec000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.serial"); + clk_register_clkdev(clk[uart_serial], "per", "21f0000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.serial"); + clk_register_clkdev(clk[uart_serial], "per", "21f4000.serial"); + clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.serial"); + clk_register_clkdev(clk[enet], NULL, "2188000.ethernet"); clk_register_clkdev(clk[usdhc1], NULL, "2190000.usdhc"); clk_register_clkdev(clk[usdhc2], NULL, "2194000.usdhc"); clk_register_clkdev(clk[usdhc3], NULL, "2198000.usdhc"); |