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author | Roger Quadros <rogerq@ti.com> | 2014-09-02 16:57:06 +0300 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2014-09-04 12:39:22 -0700 |
commit | 2b54057c9b2638792bdd83b58bad7a0cdf5f4533 (patch) | |
tree | ec5d57aba1d3415021c66b38f2bd3153ab078ace /arch/arm | |
parent | e47acd9626ec8cc0292fd54e2bc50fae12cf4188 (diff) | |
download | lwn-2b54057c9b2638792bdd83b58bad7a0cdf5f4533.tar.gz lwn-2b54057c9b2638792bdd83b58bad7a0cdf5f4533.zip |
ARM: OMAP2+: gpmc: Don't complain if wait pin is used without r/w monitoring
For NAND read & write wait pin monitoring must be kept disabled as the
wait pin is only used to indicate NAND device ready status and not to
extend each read/write cycle.
So don't print a warning if wait pin is specified while read/write
monitoring is not in the device tree.
Sanity check wait pin number irrespective if read/write monitoring is
set or not.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Pekon Gupta <pekon@pek-sem.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/gpmc.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 9f42d5437fcc..2f97228f188a 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -1207,8 +1207,7 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) } } - if ((p->wait_on_read || p->wait_on_write) && - (p->wait_pin > gpmc_nr_waitpins)) { + if (p->wait_pin > gpmc_nr_waitpins) { pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); return -EINVAL; } @@ -1288,8 +1287,8 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) p->wait_on_write = of_property_read_bool(np, "gpmc,wait-on-write"); if (!p->wait_on_read && !p->wait_on_write) - pr_warn("%s: read/write wait monitoring not enabled!\n", - __func__); + pr_debug("%s: rd/wr wait monitoring not enabled!\n", + __func__); } } |