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authorMaxime Ripard <maxime.ripard@free-electrons.com>2015-03-26 15:53:44 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-04-27 08:20:32 +0200
commitccb4ada2f193c7d5dc944cc925d1f58e5a007c0c (patch)
treead513df7cc84740a679ac6fd77adef0fd1976abe /arch/arm
parente6f51e4bd2a5bb12678330033dc995192507426f (diff)
downloadlwn-ccb4ada2f193c7d5dc944cc925d1f58e5a007c0c.tar.gz
lwn-ccb4ada2f193c7d5dc944cc925d1f58e5a007c0c.zip
ARM: dts: sun7i: Add A20 SRAM and SRAM controller
The A20 has a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller. Since most of the time these SRAM won't be accessible by the CPU, we can't use the mmio-sram driver and compatible. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [hdegoede@redhat.com: Do not change soc node name, change compatible to sun4i-a10-sram-controller to match the driver change] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 24eae39eefa6..d4ba77202d7a 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -521,12 +521,46 @@
};
};
+ /*
+ * Note we use the address where the mmio registers start, not where
+ * the SRAM blocks start, this cannot be changed because that would be
+ * a devicetree ABI change.
+ */
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
+ sram@00000000 {
+ compatible = "allwinner,sun4i-a10-sram";
+ reg = <0x00000000 0x4000>;
+ allwinner,sram-name = "A1";
+ };
+
+ sram@00004000 {
+ compatible = "allwinner,sun4i-a10-sram";
+ reg = <0x00004000 0x4000>;
+ allwinner,sram-name = "A2";
+ };
+
+ sram@00008000 {
+ compatible = "allwinner,sun4i-a10-sram";
+ reg = <0x00008000 0x4000>;
+ allwinner,sram-name = "A3-A4";
+ };
+
+ sram@00010000 {
+ compatible = "allwinner,sun4i-a10-sram";
+ reg = <0x00010000 0x1000>;
+ allwinner,sram-name = "D";
+ };
+
+ sram-controller@01c00000 {
+ compatible = "allwinner,sun4i-a10-sram-controller";
+ reg = <0x01c00000 0x30>;
+ };
+
nmi_intc: interrupt-controller@01c00030 {
compatible = "allwinner,sun7i-a20-sc-nmi";
interrupt-controller;