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author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-10-05 17:11:50 +0200 |
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committer | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-11-29 10:37:52 +0100 |
commit | 59fa1e51ba54e1f513985a8177969b62973f7fd5 (patch) | |
tree | f6aee3e29c799ccfa9e1456537a668e906a7be91 /arch/arm64 | |
parent | 1fcda8ceb014aafd56f10b33e0077c93b5dd45d1 (diff) | |
download | lwn-59fa1e51ba54e1f513985a8177969b62973f7fd5.tar.gz lwn-59fa1e51ba54e1f513985a8177969b62973f7fd5.zip |
arm64: dts: mediatek: mt8186: Change gpu speedbin nvmem cell name
MT8186's GPU speedbin value must be interpreted, or the value will not
be meaningful.
Use the correct "gpu-speedbin" nvmem cell name for the GPU speedbin to
allow triggering the cell info fixup handler, hence feeding the right
speedbin number to the users.
Cc: stable@vger.kernel.org
Fixes: 263d2fd02afc ("arm64: dts: mediatek: mt8186: Add GPU speed bin NVMEM cells")
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20231005151150.355536-1-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8186.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index f04ae70c470a..f4c4f61c779d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1656,7 +1656,7 @@ #address-cells = <1>; #size-cells = <1>; - gpu_speedbin: gpu-speed-bin@59c { + gpu_speedbin: gpu-speedbin@59c { reg = <0x59c 0x4>; bits = <0 3>; }; |