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| author | Marc Zyngier <maz@kernel.org> | 2021-02-08 09:57:11 +0000 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-02-08 12:51:26 +0000 |
| commit | b161f92482426a7323884d57cbae683812909988 (patch) | |
| tree | d8d1f9c7bad35bdc7d356c225674e86cb81231ce /arch/arm64/mm | |
| parent | 114945d84a30a5feba8ec24d854257c78c89abd1 (diff) | |
| download | lwn-b161f92482426a7323884d57cbae683812909988.tar.gz lwn-b161f92482426a7323884d57cbae683812909988.zip | |
arm64: Fix outdated TCR setup comment
The arm64 kernel has long be able to use more than 39bit VAs.
Since day one, actually. Let's rewrite the offending comment.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: David Brazdil <dbrazdil@google.com>
Link: https://lore.kernel.org/r/20210208095732.3267263-3-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/mm')
| -rw-r--r-- | arch/arm64/mm/proc.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 1f7ee8c8b7b8..ece785477bdc 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -464,8 +464,8 @@ SYM_FUNC_START(__cpu_setup) #endif msr mair_el1, x5 /* - * Set/prepare TCR and TTBR. We use 512GB (39-bit) address range for - * both user and kernel. + * Set/prepare TCR and TTBR. TCR_EL1.T1SZ gets further + * adjusted if the kernel is compiled with 52bit VA support. */ mov_q x10, TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \ TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ |