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author | Will Deacon <will@kernel.org> | 2021-06-24 13:35:46 +0100 |
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committer | Will Deacon <will@kernel.org> | 2021-06-24 13:35:46 +0100 |
commit | eda2171d854722ec85ad99daedc331bc00c9cdda (patch) | |
tree | e0ab57b7d5bb3091c3c903e9884829153aea4827 /arch/arm64/kernel/process.c | |
parent | 5ceb045541ad979fd304ca2321bf1fbb76189867 (diff) | |
parent | cf292e93f423fdebdf751a22ea01249196806328 (diff) | |
download | lwn-eda2171d854722ec85ad99daedc331bc00c9cdda.tar.gz lwn-eda2171d854722ec85ad99daedc331bc00c9cdda.zip |
Merge branch 'for-next/cpufeature' into for-next/core
Additional CPU sanity checks for MTE and preparatory changes for systems
where not all of the CPUs support 32-bit EL0.
* for-next/cpufeature:
arm64: Restrict undef hook for cpufeature registers
arm64: Kill 32-bit applications scheduled on 64-bit-only CPUs
KVM: arm64: Kill 32-bit vCPUs on systems with mismatched EL0 support
arm64: Allow mismatched 32-bit EL0 support
arm64: cpuinfo: Split AArch32 registers out into a separate struct
arm64: Check if GMID_EL1.BS is the same on all CPUs
arm64: Change the cpuinfo_arm64 member type for some sysregs to u64
Diffstat (limited to 'arch/arm64/kernel/process.c')
-rw-r--r-- | arch/arm64/kernel/process.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 8928fba54e4b..80bed2659922 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -532,6 +532,15 @@ static void erratum_1418040_thread_switch(struct task_struct *prev, write_sysreg(val, cntkctl_el1); } +static void compat_thread_switch(struct task_struct *next) +{ + if (!is_compat_thread(task_thread_info(next))) + return; + + if (static_branch_unlikely(&arm64_mismatched_32bit_el0)) + set_tsk_thread_flag(next, TIF_NOTIFY_RESUME); +} + static void update_sctlr_el1(u64 sctlr) { /* @@ -573,6 +582,7 @@ __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev, ssbs_thread_switch(next); erratum_1418040_thread_switch(prev, next); ptrauth_thread_switch_user(next); + compat_thread_switch(next); /* * Complete any pending TLB or cache maintenance on this CPU in case @@ -638,8 +648,15 @@ unsigned long arch_align_stack(unsigned long sp) */ void arch_setup_new_exec(void) { - current->mm->context.flags = is_compat_task() ? MMCF_AARCH32 : 0; + unsigned long mmflags = 0; + + if (is_compat_task()) { + mmflags = MMCF_AARCH32; + if (static_branch_unlikely(&arm64_mismatched_32bit_el0)) + set_tsk_thread_flag(current, TIF_NOTIFY_RESUME); + } + current->mm->context.flags = mmflags; ptrauth_thread_init_user(); mte_thread_init_user(); |